STM32U5: UART Frame Error on High System Clock Speeds?

[SomeshC-AI]

Greetings,

I'm having a UART Frame Error (identified by relevant bit raised in UART ISR, and relevant error flag routine in UART_IRQHandler) when attempting to running LPUART1 off a 120MHz SysClock on a STM32U575RG present on our boards.

I've replicated the error on a NUCLEO board (NUCLEO-U575ZI-Q) UART by using the "UART_ReceptionToIdle_CircularDMA" example and changing ONLY the SystemClock_Config as follows:

void SystemClock_Config(void)
{
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};

  /** Configure the main internal regulator output voltage
  */
  if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
  {
    Error_Handler();
  }

  /** Initializes the CPU, AHB and APB buses clocks
  */

  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
  RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV1;
  RCC_OscInitStruct.PLL.PLLM = 2;

  RCC_OscInitStruct.PLL.PLLN = 30;
  RCC_OscInitStruct.PLL.PLLR = 2;	
  RCC_OscInitStruct.PLL.PLLP = 7;	
  RCC_OscInitStruct.PLL.PLLQ = 4;	
  RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_0;
  RCC_OscInitStruct.PLL.PLLFRACN = 0;
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  {
    Error_Handler();
  }

  /** Initializes the CPU, AHB and APB buses clocks
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
                              |RCC_CLOCKTYPE_PCLK3;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
  RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
  {
    Error_Handler();
  }
}

 The Frame Error pops up under these conditions on the Nucleo board, but this time for the USART1 peripheral which is used in the example.

Any ideas on what's going wrong?

[Andrew Neil]

What is the source of that data?

Have you checked the accuracy of its baud rate?

[Tesla DeLorean]

Watch HSE_VALUE and actual clock source on NUCLEO boards with ST-LINK/V3

Default is 8333333 MHz

Can not be configured to HSE/5 ie 5 MHz instead of HSE/3

Check signal accuracy with scope.