STOP2 Mode I2C

dlagyals · ‎2025-06-01

I'm trying to use the LPBAM feature on the STM32U5 to perform I2C communication during STOP2 mode.
I followed the official STM32 LPBAM example and implemented my code accordingly.

Here is what I'm attempting:

Use LPTIM to generate a PWM signal during STOP2 mode.
On each rising edge of the PWM signal, trigger an I2C transmit operation via LPBAM.
The I2C communication is transmit-only (no receiving).
I confirmed that the PWM signal is working correctly using an LED.
However, the LCD connected via I2C does not display any data, as if the I2C transmission never occurs.

What could be the possible reason why the I2C data is not transmitted even though the PWM trigger is working?


/* USER CODE BEGIN Header */
/**
  ******************************************************************************
  * @file           : main.c
  * @brief          : Main program body
  ******************************************************************************
  * @attention
  *
  * Copyright (c) 2025 STMicroelectronics.
  * All rights reserved.
  *
  * This software is licensed under terms that can be found in the LICENSE file
  * in the root directory of this software component.
  * If no LICENSE file comes with this software, it is provided AS-IS.
  *
  ******************************************************************************
  */
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "fdcan.h"
#include "icache.h"
#include "lpdma.h"
#include "memorymap.h"
#include "gpio.h"

/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "lpbam_lpi2c.h"
#include <stdint.h>
#include <string.h>
/* USER CODE END Includes */

/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */

/* USER CODE END PTD */

/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */

/* USER CODE END PD */

/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */

/* USER CODE END PM */

/* Private variables ---------------------------------------------------------*/

I2C_HandleTypeDef hi2c3;
extern DMA_HandleTypeDef handle_LPDMA1_Channel0;
LPTIM_HandleTypeDef hlptim1;
/* USER CODE BEGIN PV */
FDCAN_RxHeaderTypeDef RxHeader;
uint8_t RxData[8] = { 0, 1, 2, 3, 4, 5, 6, 7 };
FDCAN_TxHeaderTypeDef TxHeader;
uint8_t TxData[8] = {0,1,2,3,4,5,6,7};
volatile uint8_t rx_data_ready=0;
volatile uint8_t system_busy = 0;
volatile uint8_t tx_requested = 0;
uint8_t I2CTxData[8]= { 0, 0, 0, 0, 0, 0, 0, 0 };
/* USER CODE END PV */

/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void SystemPower_Config(void);
/* USER CODE BEGIN PFP */
void FDCAN_Config(void);
void FDCAN_TX(void);
void FDCAN_RX(void);
/* USER CODE END PFP */

/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */

/**
  * @brief  The application entry point.
  * @retval int
  */
int main(void)
{

  /* USER CODE BEGIN 1 */

  /* USER CODE END 1 */

  /* MCU Configuration--------------------------------------------------------*/

  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
  HAL_Init();

  /* USER CODE BEGIN Init */

  /* USER CODE END Init */

  /* Configure the System Power */
  SystemPower_Config();

  /* Configure the system clock */
  SystemClock_Config();

  /* USER CODE BEGIN SysInit */

  /* USER CODE END SysInit */

  /* Initialize all configured peripherals */
  MX_GPIO_Init();
  MX_LPDMA1_Init();
  MX_ICACHE_Init();
  MX_FDCAN1_Init();
  /* USER CODE BEGIN 2 */
  MX_LPI2C_Init();
  MX_LPI2C_Scenario_Init();
  /* USER CODE END 2 */

  /* Infinite loop */
  /* USER CODE BEGIN WHILE */
  while (1)
  {
	     __HAL_PWR_CLEAR_FLAG(PWR_FLAG_SBF);


	       HAL_FDCAN_Stop(&hfdcan1);
	       __HAL_RCC_PWR_CLK_ENABLE ();
	       memcpy(I2CTxData, RxData, 8);


	       MX_LPI2C_Scenario_Build();
	       MX_LPI2C_Scenario_Link(&handle_LPDMA1_Channel0);
	       MX_LPI2C_Scenario_Start(&handle_LPDMA1_Channel0);
	       HAL_PWREx_EnterSTOP2Mode(PWR_STOPENTRY_WFI);


	       SystemClock_Config();
	       HAL_Delay(100);

	      __HAL_RCC_FDCAN1_CLK_ENABLE();
	       HAL_Delay(100);

	       HAL_FDCAN_ExitPowerDownMode(&hfdcan1);
	       HAL_NVIC_ClearPendingIRQ(FDCAN1_IT0_IRQn);
	       HAL_NVIC_SetPriority(FDCAN1_IT0_IRQn, 0, 0);
	       HAL_NVIC_EnableIRQ(FDCAN1_IT0_IRQn);

	       HAL_FDCAN_DeInit(&hfdcan1);
	       HAL_FDCAN_Init(&hfdcan1);
	       FDCAN_Config();

	     while (tx_requested)
	     {
	         system_busy = 1;
	         tx_requested = 0;

	         FDCAN_TX();
	         HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5, 0);
	         HAL_Delay(1000);

	         if (rx_data_ready)
	         {
	             rx_data_ready = 0;
	             FDCAN_RX();
	         }
	         system_busy = 0;
	     }
    /* USER CODE END WHILE */

    /* USER CODE BEGIN 3 */
  }
  /* USER CODE END 3 */
}

/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};

  /** Configure the main internal regulator output voltage
  */
  if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE3) != HAL_OK)
  {
    Error_Handler();
  }

  /** Initializes the CPU, AHB and APB buses clocks
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
  RCC_OscInitStruct.MSIState = RCC_MSI_ON;
  RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
  RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_4;
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
  RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV1;
  RCC_OscInitStruct.PLL.PLLM = 1;
  RCC_OscInitStruct.PLL.PLLN = 32;
  RCC_OscInitStruct.PLL.PLLP = 2;
  RCC_OscInitStruct.PLL.PLLQ = 32;
  RCC_OscInitStruct.PLL.PLLR = 2;
  RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_0;
  RCC_OscInitStruct.PLL.PLLFRACN = 0;
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  {
    Error_Handler();
  }

  /** Initializes the CPU, AHB and APB buses clocks
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
                              |RCC_CLOCKTYPE_PCLK3;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
  RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
  {
    Error_Handler();
  }
}

/**
  * @brief Power Configuration
  * @retval None
  */
static void SystemPower_Config(void)
{

  /*
   * Switch to SMPS regulator instead of LDO
   */
  if (HAL_PWREx_ConfigSupply(PWR_SMPS_SUPPLY) != HAL_OK)
  {
    Error_Handler();
  }
/* USER CODE BEGIN PWR */
/* USER CODE END PWR */
}

/* USER CODE BEGIN 4 */
void FDCAN_Config(void)
{
  FDCAN_FilterTypeDef sFilterConfig;

  /* Configure Rx filter */
  sFilterConfig.IdType = FDCAN_STANDARD_ID;
  sFilterConfig.FilterIndex = 0;
  sFilterConfig.FilterType = FDCAN_FILTER_RANGE;
  sFilterConfig.FilterConfig = FDCAN_FILTER_TO_RXFIFO0;
  sFilterConfig.FilterID1 = 0x000;
  sFilterConfig.FilterID2 = 0x7FF;
  if (HAL_FDCAN_ConfigFilter(&hfdcan1, &sFilterConfig) != HAL_OK)
  {
    Error_Handler();
  }

  /* Start the FDCAN module */
  if (HAL_FDCAN_Start(&hfdcan1) != HAL_OK)
  {
    Error_Handler();
  }

  if (HAL_FDCAN_ActivateNotification(&hfdcan1, FDCAN_IT_RX_FIFO0_NEW_MESSAGE, 0) != HAL_OK)
  {
    Error_Handler();
  }

  if (HAL_FDCAN_ActivateNotification(&hfdcan1, FDCAN_IT_TX_COMPLETE, 0) != HAL_OK)
  {
    Error_Handler();
  }

  /* Prepare Tx Header */
  TxHeader.Identifier = 0x321;
  TxHeader.IdType = FDCAN_STANDARD_ID;
  TxHeader.TxFrameType = FDCAN_DATA_FRAME;
  TxHeader.DataLength = FDCAN_DLC_BYTES_8;
  TxHeader.ErrorStateIndicator = FDCAN_ESI_ACTIVE;
  TxHeader.BitRateSwitch = FDCAN_BRS_OFF;
  TxHeader.FDFormat = FDCAN_CLASSIC_CAN;
  TxHeader.TxEventFifoControl = FDCAN_STORE_TX_EVENTS;
  TxHeader.MessageMarker = 0;
}

void HAL_GPIO_EXTI_Rising_Callback(uint16_t GPIO_Pin)
{
    if(GPIO_Pin == BTN_Pin)
    {
        if (!system_busy)
        {
            tx_requested = 1;
            HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5, 1);
        }
    }
}

void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo0ITs)
{
   if (RxFifo0ITs & FDCAN_IT_RX_FIFO0_NEW_MESSAGE)
   {
      HAL_GPIO_WritePin(GPIOA, GPIO_PIN_6, 1);
      rx_data_ready = 1;
   }

}


void FDCAN_TX(void)
{
	HAL_FDCAN_AddMessageToTxFifoQ(&hfdcan1, &TxHeader, TxData);
}

void FDCAN_RX(void)
{
       if (HAL_FDCAN_GetRxMessage(&hfdcan1, FDCAN_RX_FIFO0, &RxHeader, RxData) != HAL_OK)
       {

           return;
       }



       /* Display LEDx */
       if ((RxHeader.Identifier == 0x000)
    		&& (RxHeader.IdType == FDCAN_STANDARD_ID)
			&& (RxHeader.DataLength == FDCAN_DLC_BYTES_8))
       {

           uint8_t delay_ms = RxData[1];
           HAL_Delay(delay_ms);
           HAL_GPIO_WritePin(GPIOA, GPIO_PIN_6, 0);

       }

}
/* USER CODE END 4 */

/**
  * @brief  This function is executed in case of error occurrence.
  * @retval None
  */
void Error_Handler(void)
{
  /* USER CODE BEGIN Error_Handler_Debug */
	HAL_GPIO_WritePin(GPIOA, GPIO_PIN_7, 1);
  /* User can add his own implementation to report the HAL error return state */
  __disable_irq();
  while (1)
  {
  }
  /* USER CODE END Error_Handler_Debug */
}

#ifdef  USE_FULL_ASSERT
/**
  * @brief  Reports the name of the source file and the source line number
  *         where the assert_param error has occurred.
  * @PAram  file: pointer to the source file name
  * @PAram  line: assert_param error line source number
  * @retval None
  */
void assert_failed(uint8_t *file, uint32_t line)
{
  /* USER CODE BEGIN 6 */
  /* User can add his own implementation to report the file name and line number,
     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
  /* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */

Sarra.S · ‎2025-06-04

yes, if the recieve buffer is not located in SRAM4, the transfer will fail

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

View solution in original post

Sarra.S · ‎2025-06-03

Hello @dlagyals,

Thank you for the detailed explanation,

You should note that the LPDMA can only use SRAM4 for its source/destination buffers and linked lists, so if the I2C transmit buffer (or any LPBAM related linked lists) are allocated outside of SRAM4, the LPDMA operations will fail!

You can further verify this in the RM, only peripherals and memory regions in the SmartRun domain (like SRAM4) are accessible.

Hope that solves the issue!

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

dlagyals · ‎2025-06-03

Thanks for the information.
I’m aware that only the SRAM4 memory region can be used, so I disabled power-down for SRAM4 in both RUN and STOP modes in the .ioc settings and re-ran the project, but it still didn’t work.
I also modified the FLASH.ld linker script as follows


RAM   (xrw) : ORIGIN = 0x28000000, LENGTH = 16K
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K

Even with this change, the I2C data is still not displayed on the LCD.
Is it possible that the receive buffer (the memory area used for receiving messages) also needs to be located in SRAM4?

Sarra.S · ‎2025-06-04

yes, if the recieve buffer is not located in SRAM4, the transfer will fail

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

dlagyals · ‎2025-06-04

If it's only transmitting without receiving anything in return, then the address of the receiving device doesn't really matter for STM SRAM4, right?