2020-04-16 08:01 AM
Hello,
I am using STM32L4S5VIT in LQFP100 package, i want to control a non-muxed PSRAM Memory of 64Mb (ref: IS66WVE4M16EBLL-70BLI) by FMC bus.
The problem is that the MCU have just the Muxed Mode as shown below :
Can i add a multiplexer to connect between the MCU and a non-muxed PSRAM?
Could you please explain or point me at some design or documentation about creating a muxed PSRAM by using a standard PSRAM.
Thanks!
2020-04-16 09:33 AM
You'd want to look at the design of muxed memories, should really be a matter of latching all or part of address bus during the time it is valid.
The bus cycles, per Reference Manual should give you insight into the signals, and the leeway you have to use a latch/buffer IC.
Not sure ST has an app note or tutorial on such, but pretty sure you could find equivalent docs, or cover in micro-controller architecture texts, and the like.
2021-05-12 04:34 AM
Hi , have you slove your problem by using a standard PSRAM?
2021-05-12 05:17 AM
The concept of multiplexed data/address buses is not new, whether those latches are internal or external is a matter of implementation, and the fact that external tends to be more inconvenient as it takes additional parts and board space, especially for the widest cases.
This is typically why people opt for the devices that integrate them internally, or use SDRAM which is inherently muxed in a row/column sense.
If you need a solution with a lot of memory, a) look at devices that already have significant internal memory and caches, as these will be the fastest, b) look at devices supporting one or two SDRAM's as these can yield up to 256MB a pieces.
External RAM is significantly slower, so can cause bandwidth issues. For larger code space, or static images, consider parts supporting QSPI NOR Flash.
Finally consider in the STM32 MCU series is suitable for your application, there are MPU models running Embedded Linux, and a wealth of other SoC for tablet's etc that might be a more suitable platform.