Posted on May 20, 2016 at 10:03Ah, I see.
No, my point was, that *values* for bitfields are missing. Constants. ST defines these constants in the ''libraries'' (both SPL and Cube (and maybe third time in LL? I did not investigate)) in an unsystematic, haphazard fashion.
For example:
// trigger (TRGI) source
#define TIM_SMCR_TS__ITR0 0 // slave -- see below for individual timers
#define TIM_SMCR_TS__ITR1 1
#define TIM_SMCR_TS__ITR2 2
#define TIM_SMCR_TS__ITR3 3
#define TIM_SMCR_TS__TI1F_ED 4 // both edges on CH1 input
#define TIM_SMCR_TS__TI1FP1 5 // TI1FP1 with the same polarity as if CH1 used for capturing in CC1
#define TIM_SMCR_TS__TI2FP2 6 // TI2FP2 with the same polarity as if CH2 used for capturing in CC2
#define TIM_SMCR_TS__ETRF 7 // external trigger input
// individual internal trigger sources
#define TIM1_SMCR_TS__TIM5 0 // TIM1 is triggered from TIM5
#define TIM1_SMCR_TS__TIM2 1 // etc.
#define TIM1_SMCR_TS__TIM3 2
#define TIM1_SMCR_TS__TIM4 3
#define TIM2_SMCR_TS__TIM1 0
#define TIM2_SMCR_TS__TIM8 1
#define TIM2_SMCR_TS__TIM3 2
#define TIM2_SMCR_TS__TIM4 3
#define TIM3_SMCR_TS__TIM1 0
#define TIM3_SMCR_TS__TIM2 1
#define TIM3_SMCR_TS__TIM5 2
#define TIM3_SMCR_TS__TIM4 3
#define TIM4_SMCR_TS__TIM1 0
#define TIM4_SMCR_TS__TIM2 1
#define TIM4_SMCR_TS__TIM3 2
#define TIM4_SMCR_TS__TIM8 3
#define TIM5_SMCR_TS__TIM2 0
#define TIM5_SMCR_TS__TIM3 1
#define TIM5_SMCR_TS__TIM4 2
#define TIM5_SMCR_TS__TIM8 3
#define TIM8_SMCR_TS__TIM1 0
#define TIM8_SMCR_TS__TIM2 1
#define TIM8_SMCR_TS__TIM4 2
#define TIM8_SMCR_TS__TIM5 3
#define TIM9_SMCR_TS__TIM2 0
#define TIM9_SMCR_TS__TIM3 1
#define TIM9_SMCR_TS__TIM10 2
#define TIM9_SMCR_TS__TIM11 3
#define TIM12_SMCR_TS__TIM4 0
#define TIM12_SMCR_TS__TIM5 1
#define TIM12_SMCR_TS__TIM13 2
#define TIM12_SMCR_TS__TIM14 3
which then allows me to write stuff like
TIM1->SMCR = 0
| (TIM1_SMCR_TS__TIM2 * TIM_SMCR_TS_0 ) // master is TIM2
| (TIM_SMCR_SMS__EXT_CLK_1 * TIM_SMCR_SMS_0 ) // external clock mode 1
;
JW
