Hi,
None of your suggestions meet our expectations.
- The DLYB_OSPI_PSRAM_ExhaustiveTuning example, our STM32H7B0VBTx has no DLYB option.
- The project use an APS6408L but we use an APS6404L-3SQR-SN has only 4 data bits.
- OSPI examples with STM32H7 examples is for HyperRam chips and not QSPI
What we must change in the sCommand? (we want to use it in memory mapped mode)
See code below:
void EnableMemMapped(void) {
OSPI_RegularCmdTypeDef sCommand;
OSPI_MemoryMappedTypeDef sMemMappedCfg;
sCommand.FlashId = HAL_OSPI_FLASH_ID_1;
sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_4_LINES;
sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_8_BITS; ==> 4 of 8 bits
sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE;
sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; ==> 4 or 8 lines
sCommand.AddressSize = HAL_OSPI_ADDRESS_24_BITS; ==> 24 or 32 bits
sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; ==> ??
sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE;
sCommand.DataMode = HAL_OSPI_DATA_8_LINES; ==> 4 or 8 lines
sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_ENABLE; ==> enable or disable
sCommand.DQSMode = HAL_OSPI_DQS_DISABLE;
sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD;
sCommand.Address = 0;
sCommand.NbData = 1;
/* Memory-mapped mode configuration for Linear burst write operations */
sCommand.OperationType = HAL_OSPI_OPTYPE_WRITE_CFG;
sCommand.Instruction = LINEAR_BURST_WRITE; ==> ==> (Value was 0x20 AP6408, but what for the AP6404??
sCommand.DummyCycles = DUMMY_CLOCK_CYCLES_SRAM_WRITE;
if (HAL_OSPI_Command(&hospi1, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) { Error_Handler(); }
/* Memory-mapped mode configuration for Linear burst read operations */
sCommand.OperationType = HAL_OSPI_OPTYPE_READ_CFG;
sCommand.Instruction = LINEAR_BURST_READ; ==> 0xA0 for the AP6408 but what using for the AP6404 ??
sCommand.DummyCycles = DUMMY_CLOCK_CYCLES_SRAM_READ;
if (HAL_OSPI_Command(&hospi1, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) { Error_Handler(); }
/*Disable timeout counter for memory mapped mode*/
sMemMappedCfg.TimeOutActivation = HAL_OSPI_TIMEOUT_COUNTER_DISABLE;
/*Enable memory mapped mode*/
if (HAL_OSPI_MemoryMapped(&hospi1, &sMemMappedCfg) != HAL_OK) { Error_Handler(); }
}
Are these settings coorect?
Btw: when executing the commands, we don't have any signal of the QSPI bus
Hi @OGhis ,
I only provided some configuration for read and write operation in memory mapped mode like that you shared, not all the code.
The SPI Quad mode enable operation command (0x35) is available only in SPI mode to switch the device into quad IO mode before enter in memory mapped:
void EnterQuadMode(void)
{
OSPI_RegularCmdTypeDef sCommand;
sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG;
sCommand.FlashId = HAL_OSPI_FLASH_ID_1;
sCommand.Instruction = ENTER_QUAD_MODE;
sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_1_LINE;
sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_8_BITS;
sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE;
sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE;
sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE;
sCommand.DataMode = HAL_OSPI_DATA_NONE;
sCommand.DummyCycles = ENTER_QUAD_DUMMY_CYCLES;
sCommand.DQSMode = HAL_OSPI_DQS_DISABLE;
sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD;
/*Enter QUAD mode*/
if (HAL_OSPI_Command(&hospi1, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
Error_Handler();
}
}
Thank you.
Kaouthar
Hi,
Thanks for the information.
We can now write and read to the external AP6404 memory, but not write byte by byte.
Here the test code we used:
#define EXTENDEDBUFFERSIZE (1048576)
#define OCTOSPI1_BASE (0x90000000UL)
volatile uint8_t *pAddr;
uint8_t counter = 0;
for (pAddr = (volatile uint8_t *) OCTOSPI1_BASE;
pAddr < (volatile uint8_t *)(OCTOSPI1_BASE + EXTENDEDBUFFERSIZE);
pAddr++) {
*pAddr = counter++;
}
The results are:
counter Addr Read at value expected value
0x00 0x90000000 0x90000004 0x00000000 0x00000000 change the value at 0x90000004
0x01 0x90000001 0x90000000 0x00000100 0x00000100
0x02 0x90000002 0x90000000 0x00020000 0x00020100
0x03 0x90000003 0x90000000 0x03000000 0x03020100
0x04 0x90000004 0x90000004 0x00000004 0x00000004 also writes 0x00000000 at 0x90000008
0x05 0x90000005 0x90000004 0x00000500 0x00000504
0x06 0x90000006 0x90000004 0x00060000 0x00060504
0x07 0x90000007 0x90000004 0x07000000 0x07060504
0x08 0x90000008 0x90000005 0x00000008 0x00000008 also writes 0x00000000 at 0x9000000B
We try also to write with 32bit data, but same results.
Only when we try wrting 64bits long data, than he write correct the data to the RAM memory.
So it looks that he has only 64bit write acces to the external RAM and 8 bit read access.
What can be wrong with the settings or ..... here?
We would write the data to the memory with 8 bit access.
Hello @OGhis ,
Glad to know that you are now able to write and read.
Please take a look at these discussions, I think you encountering the same issue:
Solved: Re: STM32H7B0RBT6 with QSPI PSRAM APS6404L-3SQR - STMicroelectronics Community
Solved: Re: [STM32H7B0][APS6404L-3SQR] Issue with Write in... - STMicroelectronics Community
Concerning the 64 bit writes , there is an errata "Memory-mapped write error response when DQS output is disabled".
So with this errata we need to enable the DQS when doing memory mapped writes even if the memory do not support DQS. This is the workaround.
Now concerning products with AXI bus (OCTOSPI memory mapped region on AXI not AHB) the memory mapped write are always done in multiple of the AXI bus size (64-bit).
So when you do a 8-16-32 bit write , the OCTOSPI will output 64-bit and mask the rest using DQS pin.
The problem is if the memory do not support DQS (which is in our case), the rest of the AXI data will be written to the memory.
Please let me know if your request in answered or not?
Thank you.
Kaouthar
