2023-08-18 04:11 AM
Hello ST Team
I am working on medical project involving patient monitoring
Currently we are using the STM32H757XI-EVAL board and trying communicate the host monitor via ethernet TCP/UDP. The underlying operating system is Azure RTOS.I am not able to find the sample with the needed combination.
I tried using the XcubeRTOSH7 repo
and making adaptation based on it, but the end result is not successful.
Kindly provide any working sample or direct towards the appropriate adaptation that are needed for the combination to work.
Repo: ( https://www.st.com/en/embedded-software/x-cube-azrtos-h7.html)
Solved! Go to Solution.
2023-09-08 02:16 AM - edited 2023-09-08 02:26 AM
Hello All,
The problem is fixed now with help of an ST expert, I was able to send the data from client (STM32h757 Eval kit) to Server(PC)
The 3 main steps missed are:
1. MPU configuration in STM32Cube IDE.(Region 0 default configuration to prevent the speculative , Region 1 telling cache should not be used to have coherence between ethernet and core)
2. Linker script update.(To update DMA descriptors at proper memory location)
3. Ethernet Interrupt enable.
After fixing this I am facing some faults like Memanagefault and Hardfault, just after data transmission. Debug in progress.
2023-08-18 04:49 AM
Hello @Lokesh1 ,
Are you using MII mode as ethernet interface or RMII interface?
If possible, please share you project, in order that Community users can help you solve your issue.
Imen
2023-08-22 08:33 AM
Hello @Imen.D
I am using RMII interface supported by STM32H757XI-EVAL board, please find the attached code base for more details.
2023-09-08 02:16 AM - edited 2023-09-08 02:26 AM
Hello All,
The problem is fixed now with help of an ST expert, I was able to send the data from client (STM32h757 Eval kit) to Server(PC)
The 3 main steps missed are:
1. MPU configuration in STM32Cube IDE.(Region 0 default configuration to prevent the speculative , Region 1 telling cache should not be used to have coherence between ethernet and core)
2. Linker script update.(To update DMA descriptors at proper memory location)
3. Ethernet Interrupt enable.
After fixing this I am facing some faults like Memanagefault and Hardfault, just after data transmission. Debug in progress.
2023-09-12 10:11 AM
In order fix the hardfault issue, you also need to make the following configuration changes compared to above solution.
The hardfault issue is raised because the nx pool buffer and we need this buffer allocated with memory in non-cachable area to store ethernet data, hence we need to make the following changes to reach 100% data transfer and fault free code.
MPU Configuration: (Previously we allotted only 1KB for descriptors now we increased the size to 32KB because 30KB is requested by NetxPool)
Linker Script: