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STM32H755 Dual Debug Startup Problem

bramble
Senior

Hi community,

I have a problem that other people have also raised and I'd be grateful for help.

I followed AN5361 and I watched this STM video on the same topic. First thing to mention is that the video and doc have different advice about whether the CM7 should Halt All Cores (Video advice) or not (AN5361 advice). Grrr!

Now I've got that off my chest here's the problem in more detail.

CM7 like this:

bramble_0-1740832043277.png

 

bramble_7-1740832218457.png

 

bramble_9-1740832308142.png

CM4:

bramble_4-1740832152320.png

 

bramble_6-1740832203055.png

bramble_10-1740832340453.png

With that configuration when I launch CM7 first, then CM4, both pause as expected with CM4 in reset and CM7 ready to go. When I select both cores then click on the green go arrow, CM7 runs straight into this:

bramble_13-1740832649025.png

Caused by the timeout expiring.

If, alternatively, I configure CM7 like this:

bramble_12-1740832561367.png

Then I can debug both cores, but they aren't doing a coordinated start as they should.

I know that I could ignore the timeout error, but then the systems wouldn't be doing a coordinated start as they should.

Any suggestions please?

 

 

 

 

1 ACCEPTED SOLUTION

Accepted Solutions
KDJEM.1
ST Employee

Hello @bramble,

 

Which STM32CubeIDE version are you using?

Do you encounter any issues when following Getting started with projects based on dual-core STM32H7 microcontrollers in STM32CubeIDE application note (with the Halt all cores option unchecked)?

May be this discussion can help you.

 

Thank you.

Kaouthar

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

View solution in original post

4 REPLIES 4
KDJEM.1
ST Employee

Hello @bramble,

 

Which STM32CubeIDE version are you using?

Do you encounter any issues when following Getting started with projects based on dual-core STM32H7 microcontrollers in STM32CubeIDE application note (with the Halt all cores option unchecked)?

May be this discussion can help you.

 

Thank you.

Kaouthar

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

bramble
Senior

Hi @KDJEM.1 , thank you for your help.

When I reported this issue I was using Vn 1.17 but today I've switched to 1.18 and the issue still exists.

I have followed the instructions in the discussion that you mentioned, which are I think the same as the relevant AN.

However, I have found that if I set the CM4 in the mode shown below then I can proceed without having to disable the CM7 timeout check:

bramble_0-1741120324386.png

I'm OK with this, since I have a solution that works.

Thanks again for your help.

 

Christophe VRIGNAUD
ST Employee

Hello,

If you check the halt all cores, the best is to avoid launching both cores.

1. Start the M7 debug => the M7 and the M4 are both halted at the beginning of their main.
At this stage, in the debugger you just have the M7 target:

ChristopheVRIGNAUD_0-1741269954588.png

2. Start the M4 debug => Hot attach to the M4 which is halted at the beginning of its main function.

ChristopheVRIGNAUD_1-1741270055928.png

3. Start the M4 => it goes in stop mode

Here you get a dummy screen => don't give attention to the address given, just keep in mind that the M4 core in in stop mode. 

ChristopheVRIGNAUD_2-1741270162609.png

4. Now you can start the M7. It will execute the HAL init and the config clock and continue running or stop on the next breakpoint.

5. Resume the M4.

At this stage, both cores are running.

 

 

 

 

bramble
Senior

Hi @Christophe VRIGNAUD many thanks for your detailed advice, much appreciated.