2024-01-19 03:48 AM
I am looking into RAM support for the SMT32H750 series chips for my future projects.
The STM32H750 series chips support 16-bit data bus as well as 32-bit data bus configuration. This mode is selected on startup, as far as I can tell.
If I were to use the STM32CubeMX tool to configure my chip, would a switch from a 16 bit to a 32-bit bus (and vice versa) require a significant re-generation of support code, or would it be realtively easy to toggle this (ignoring the pin reassignments)?
I would test this myself but it seems like all development kits for this series have a 16-bit data bus...
2024-01-19 04:30 AM - edited 2024-01-19 04:30 AM
Internally it's 32-bits
Externally it's going to depend on how the FMC is configured, the package size vs pin availability and connectivity to the SDRAM, etc. From lower pin count devices 16 bits wide might be the most practical trade off, especially if RGB TFT LCD is also used and consuming pins.
If that's not what you mean you're going to need to be more specific.
2024-01-19 04:37 AM
I have enough pins to satisfy both a 32 and a 16 bit bus. However I am also working with software derived from a legacy design that used a 16-bit chip (long story). So I am wondering if I will have to do a lot of refactoring if I switch to 32-bit mode, or if this can be a "painless" procedure.
2024-01-19 05:17 AM
Hello @etamarin
The extent of this refactoring would depend on how closely your software interacts with the hardware. If it's mostly high-level code, the impact could be minimal. But if it's low-level code that directly manipulates hardware registers, more extensive changes might be needed.
To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
2024-01-19 06:34 AM
It takes very little code, all contained within the initialization, to change between 16 and 32-bit FMC bus.
2024-01-19 06:39 AM
It should be relatively localized, probably mostly in the MSP code, and the initialization of the pins,and the FMC / SDRAM
Whether those new pins displace prior usages, and how disruptive that is to hard coded usage in other parts of the code will determine how complex the refactoring will be. Hard to call from here, but shouldn't be intractable..
2024-01-19 06:42 AM
Thanks all for the inputs. Looks like I might pull it off :)
I was also thinking to test it on some kind of evaluation board, but can't find one with a wide bus. Is something like this available for purchase?
2024-01-19 08:36 AM