STM32H745 TIMER peripheral to memory DMA
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‎2020-09-21 11:54 PM
Hi,
I'm trying to get a timer with external clock (ETR2) to trigger a DMA transfer from GPIO to memory on a STM32H745 with no luck.
I'm using cubeMX to generate the code below.
The timer seems working. TIM2_IRQHandler is triggered periodically.
However no DMA transfer seems to happen.
void MX_DMA_Init(void)
{
/* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
/* DMA interrupt init */
/* DMA1_Stream3_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn);
}
void MX_TIM2_Init(void)
{
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
TIM_MasterConfigTypeDef sMasterConfig = {0};
htim2.Instance = TIM2;
htim2.Init.Prescaler = 0;
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
htim2.Init.Period = 1;
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
{
Error_Handler();
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_ETRMODE2;
sClockSourceConfig.ClockPolarity = TIM_CLOCKPOLARITY_INVERTED;
sClockSourceConfig.ClockPrescaler = TIM_CLOCKPRESCALER_DIV1;
sClockSourceConfig.ClockFilter = 0;
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
}
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(tim_baseHandle->Instance==TIM2)
{
/* USER CODE BEGIN TIM2_MspInit 0 */
/* USER CODE END TIM2_MspInit 0 */
/* TIM2 clock enable */
__HAL_RCC_TIM2_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**TIM2 GPIO Configuration
PA15 (JTDI) ------> TIM2_ETR
*/
GPIO_InitStruct.Pin = GPIO_PIN_15;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* TIM2 DMA Init */
/* TIM2_UP Init */
hdma_tim2_up.Instance = DMA1_Stream3;
hdma_tim2_up.Init.Request = DMA_REQUEST_TIM2_UP;
hdma_tim2_up.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_tim2_up.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_tim2_up.Init.MemInc = DMA_MINC_ENABLE;
hdma_tim2_up.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
hdma_tim2_up.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
hdma_tim2_up.Init.Mode = DMA_CIRCULAR;
hdma_tim2_up.Init.Priority = DMA_PRIORITY_VERY_HIGH;
hdma_tim2_up.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_tim2_up) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(tim_baseHandle,hdma[TIM_DMA_ID_UPDATE],hdma_tim2_up);
/* TIM2 interrupt Init */
HAL_NVIC_SetPriority(TIM2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM2_IRQn);
/* USER CODE BEGIN TIM2_MspInit 1 */
/* USER CODE END TIM2_MspInit 1 */
}
}
/**
* @brief This function handles DMA1 stream3 global interrupt.
*/
//gets NEVER triggered
void DMA1_Stream3_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
/* USER CODE END DMA1_Stream3_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_tim2_up);
/* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
/* USER CODE END DMA1_Stream3_IRQn 1 */
}
/**
* @brief This function handles TIM2 global interrupt.
*/
//gets triggered periodically
void TIM2_IRQHandler(void)
{
/* USER CODE BEGIN TIM2_IRQn 0 */
/* USER CODE END TIM2_IRQn 0 */
HAL_TIM_IRQHandler(&htim2);
/* USER CODE BEGIN TIM2_IRQn 1 */
/* USER CODE END TIM2_IRQn 1 */
}
//Example code that doesn't work
uint32_t addresses[10];
memset(addresses, 0xFF, sizeof(addresses));
HAL_DMA_Start_IT(&hdma_tim2_up, (uint32_t)&GPIOE->IDR, (uint32_t)&addresses, 10);
//Also tried:
//HAL_DMA_Start(&hdma_tim2_up, (uint32_t)&GPIOE->IDR, (uint32_t)&addresses, 10);
__HAL_TIM_ENABLE_DMA(&htim2, TIM_DMA_ID_UPDATE);
//__HAL_TIM_ENABLE(&htim2);
HAL_TIM_Base_Start_IT(&htim2);
while(true)
{
}
Does anyone have any idea why my DMA transfer never triggers?
Thanks!
Melvin
Labels:
- Labels:
-
DMA
-
STM32H7 Series
-
TIM
2 REPLIES 2
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‎2020-09-22 11:48 AM
Also:
- This is on the M7 core
- I and D cache temporary disabled
- Tried DMA1 and DMA2
- I know DMAx can't access DTCM. I've tried SRAM4, SRAM1 and AXI SRAM.
- Tried __disable_irq and __enable_irq in between the example code.
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‎2020-09-22 06:33 PM
Read out and check/post TIM, DMAMUX and DMA registers' content.
JW