STM32H7 GPIO TOGLE MAX FREQUENCY

Danilo Frigerio · ‎2018-05-07

Posted on May 07, 2018 at 14:08

With STM32F765 and MDK-ARM compiler ( O3 and compile for SPEED I was able to achieve 108Mhz on output pin, performing while loop ( just main() and all interrupt disabled ) .

Now with STM32H743 with same compiler and same source maximum frequency is 16.7MHz , with PLL configured to have 400MHz clock ( tested on RCC_MCO2 output pin )

Anyone know why ?

Thanks

Amel NASRI · ‎2018-05-17

Posted on May 17, 2018 at 15:38

Hi

Frigerio.Danilo

‌,

First, we may ask about the relevance of toggling a GPIO with CPU at maximum clock (as stated by Avatar)?

For some use-cases, you may use a timer ...

Back to the explanation of the discrepancy between results with STM32F7 and the ones with STM32H7: the main reason is that both families don't share the same architecture:

STM32F7 has one bus matrix and both the Core and and GPIO are connected to that same bus matrix

STM32H7 has three domains.Cortex-M7 is connected to AXI bus matrix while the GPIO is connected to another AHB bus matrix. Then, a latency is introduced because of bridges connecting these bus matrices.

You may refer to 'System Architecture' section in the reference manuals of both products for more details.

-Amel

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

View solution in original post

henry.dick · ‎2018-05-07

Posted on May 07, 2018 at 16:42

Default clock, bus speed, gpio drive, compiler optimization, software access approach, coding, ....

AvaTar · ‎2018-05-07

Posted on May 07, 2018 at 16:57

GPIO glitch filter.

WTH is the relevance of toggling a pin with 100% core load ?

Amel NASRI · ‎2018-05-17

Posted on May 17, 2018 at 15:38

Hi

Frigerio.Danilo

‌,

First, we may ask about the relevance of toggling a GPIO with CPU at maximum clock (as stated by Avatar)?

For some use-cases, you may use a timer ...

Back to the explanation of the discrepancy between results with STM32F7 and the ones with STM32H7: the main reason is that both families don't share the same architecture:

STM32F7 has one bus matrix and both the Core and and GPIO are connected to that same bus matrix

STM32H7 has three domains.Cortex-M7 is connected to AXI bus matrix while the GPIO is connected to another AHB bus matrix. Then, a latency is introduced because of bridges connecting these bus matrices.

You may refer to 'System Architecture' section in the reference manuals of both products for more details.

-Amel

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

Danilo Frigerio · ‎2018-05-17

Posted on May 17, 2018 at 16:00

,

Dear Amel

What you said is about what I imagined, really I don't need to toggle

pin at this speed, this was just to compare M7 and H7.

I will compare it in a real way, comparing my fw now running on

STM32F765 ( high speed camera scanning )

Thanks and regards

Danilo Frigerio

Il 17/05/2018 15:38, Amel N ha scritto:

>,

STMicroelectronics Community

<,https://community.st.com/?et=watches.email.thread>,

>,

Re: STM32H7 GPIO TOGLE MAX FREQUENCY

reply from Amel N

<,

/STM32 MCUs Forum/ - View the full discussion

<,https://community.st.com/0D70X000006Sm8qSAC

>,