2025-06-16 1:35 PM
Hello,
I'm kind of newbie in the STM32 world, I'm more used with another brand of 32bits microcontroller that also have a "parrallel port" for interfacing external ram device.
My concern is about the FMC on the STM32H7.
I want to read/write a 16bits device.
Currently I'm using this configuration (almost the default one) :
My code for testing a write operation :
....
I can't see any problem in the code but when I check signals with an oscilloscope, I can see that the CPU is issuing 4 consecutive write operation :
A0 / A1 are also increasing as if the CPU is writing to 4 different places.
How can it be possible.
I have seen in the datasheet that when AXI bus and external bus is different size, it can occurs. But in that case how to perform a correct 16 bit operation ??
Other people seems to have this kind of trouble but nobody replied with a solution :
https://community.st.com/t5/stm32-mcus-products/h7-series-fmc-question/td-p/131535
Thanks in advance for any help
Solved! Go to Solution.
2025-06-19 2:27 AM - edited 2025-06-19 2:28 AM
I'm looking at one project for STM32H753 with FPGA, there we defined the FMC "instance" type as NOR, not as SRAM. The windows addresses are in 0x60000000 range; set in MPU as non-shared device; not remapped.
32-bit accesses to the FPGA work just fine, no unexpected behavior.
2025-06-23 10:35 AM
Currently, I manage to make it work but it's not the way I thought.
I had to change the bank address to 0xC0000000
and deactivate MPU.
I can see one write cycle and my device is now working as expected.
But I'm not sure it's a good idea to deactivate the MPU.
I later found this related thread :
By the way, it's sad that cubeide didn't warm you about the bank remapping needed in 16 bits mode needed for sram/nor/lcd..