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STM32H743 SDMMC handling timeouts -- problem with IDMA control register

Feoggou
Visitor

Hi,

I'm using NuttX as RTOS on my STM32 board.

I have a timer set in the DTIMER register, and in the interrupt handler of the SDMMC, if it detects a timeout, the way the code handles it is that does this:

1. disable all transfer related interrupts // flags to the SDMMC mask register.

2. Set "Stop transmission" command to the CPSM command register.

3. Set to the Interrupt clear register the following:

STM32_SDMMC_ICR_DATAENDC |       // DATAEND flag clear bit
STM32_SDMMC_ICR_DCRCFAILC |      // DCRCFAIL flag clear bit
STM32_SDMMC_ICR_DTIMEOUTC |     // DTIMEOUT flag clear bit
STM32_SDMMC_ICR_RXOVERRC |      // RXOVERR flag clear bit
STM32_SDMMC_ICR_TXUNDERRC |     // TXUNDERR flag clear bit
STM32_SDMMC_ICR_DBCKENDC          // DBCKEND flag clear bit

However, the problem I'm having is that the IDMA control register remains enabled, and if I try to reset it myself to 0, when I read it back it's still enabled.

Before a new I/O is attempted on the sd card, the following registers are (re)set:

1. Set IDMA control register to 0 (will still have enable bit on, even after this set)

2. Reset DTIMER: set UINT32_MAX to the register

3. Reset DLENT register to 0

4. For the data control register (DCTRL), reset (to 0) the following bits:

DTEN - Data Transfer Enable Bit

Data block size

Data transfer direction

Data transfer mode

And then the new I/O is attempted, but it doesn't go far because the enable bit on the IDMA control register remains enabled.

Can anybody please tell me what is wrong in this setup? Is the timeout being handled erroneously here, could that be the problem? And if yes, what exactly is the problem?

Thank you!

1 REPLY 1

Internal DMA  IDMAEN bit  cant set  or reset when  DPSMACT  ==1.

This means that  system is not on idle state (probably on transfer state). 

Try to stop data transfer by clearing CMDTRANS  at CMDR register.