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STM32H7 ADC using timers

GHARI.1
Associate II

Hello,

I am using Nucleo-H743ZI ,I am using timer1 to trigger ADC.

My APB1 clock frequency is 240MHz and my ARR register is 240 of timer 1. So my sampling rate of ADC should be 1Msamples/sec. To check it I am toggling a pin whenever ADC conversion complete is done.

Instead of 1Msamples/sec I am getting around 250Ksamples/sec what might be the issue.

For low PWM frequency the relation (TIMER1_freq=APB1_frequency/ARR) is working fine as I decrease ARR my PWM output is not following above formulae.

Can anyone help me out what might be the issue?

13 REPLIES 13

@Georgy Moshkin​ How to use memcpy or mem2mem functions any example code?

Please check my answer to this thread: https://community.st.com/s/question/0D53W000016nboxSAA/spireceive-to-usbtransmit-via-dma-on-stm32h7

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For mem2mem check my previous reply with a link to the topic.

Here is example for sliding window using memmove + memcpy,

void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
{
	memmove(  (void *)&adcWindow[0],  (void *)&adcWindow[0+ADC_BUFFER_SIZE/2],sizeof(adcWindow)-sizeof(adcBuffer)/2); // dst src
	memcpy(  (void *)&adcWindow[ADC_WINDOW_SIZE-ADC_BUFFER_SIZE/2],  (void *)&adcBuffer[0],sizeof(adcBuffer)/2); // dst src
	adcReady=1;
}
 
void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
{
	memmove(  (void *)&adcWindow[0],  (void *)&adcWindow[0+ADC_BUFFER_SIZE/2],sizeof(adcWindow)-sizeof(adcBuffer)/2); // dst src
	memcpy(  (void *)&adcWindow[ADC_WINDOW_SIZE-ADC_BUFFER_SIZE/2],  (void *)&adcBuffer[ADC_BUFFER_SIZE/2],sizeof(adcBuffer)/2); // dst src
	adcReady=1;
}

Note that memcpy will waste some CPU cycles, you can toggle GPIO before and after memcpy and see how long it takes on a scope.

If you need highly optimized custom solution, write an email, address is in my profile.

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tolix
Associate

Hi! If you are getting 250K samples instead of 1M samples (4 times lesser), then the problem may be in the Length parameter in functions like HAL_ADCEx_MultiModeStart_DMA(...). The Length parameter should be not in bytes as declared in the description, but in number of transfers. So, if you use dual mode (1 word = 4 bytes per DMA transfer) and specify Length in bytes, you will get exactly 4 times lesser ADC rate, because DMA will stop after N * 4 number of transfers.