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STM32G473CB Flash Bank Configuration

schwil
Associate II

I'm currently trying to implement the eeprom emulation library provided by ST on an STM32G473CB. However, I'm dubious about whether this library, and also the HAL flash modules, are properly detecting that I'm working with this specific device.

From what I can gather in the table on page 4 of the following document, the STM32G473CB is a category 2 device given that it has 128kb of flash. https://www.st.com/content/ccc/resource/training/technical/product_training/group0/33/dc/74/43/0e/2d/46/4b/STM32G4-Memory-Flash_FLASH/files/STM32G4-Memory-Flash_FLASH.pdf/jcr:content/translations/en.STM32G4-Memory-Flash_FLASH.pdf

This implies that it doesn't have dual bank capability, but this seems to be disregarded by the CMSIS header file for STM32G473xx devices (stm32g473xx.h) and then in turn by the libraries provided by ST.

The HAL flash modules and the eeprom emulation library appear to detect dbank capability by checking for a FLASH_OPTR_DBANK define, as seen in the following set of macros found in "stm32g4xx_hal_flash.h".

#if defined (FLASH_OPTR_DBANK)
#define FLASH_SIZE                      ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0xFFFFU)) ? (0x200UL << 10U) : \
                                        (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & 0xFFFFUL) << 10U))
#define FLASH_BANK_SIZE                 (FLASH_SIZE >> 1)
#define FLASH_PAGE_NB                   128U
#define FLASH_PAGE_SIZE_128_BITS        0x1000U /* 4 KB */
#else
#define FLASH_SIZE                      ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0xFFFFU)) ? (0x80UL << 10U) : \
                                        (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & 0xFFFFUL) << 10U))
#define FLASH_BANK_SIZE                 (FLASH_SIZE)
#define FLASH_PAGE_NB                   64U
#endif
 
#define FLASH_PAGE_SIZE                 0x800U  /* 2 KB */
 
#define FLASH_TIMEOUT_VALUE             1000U   /* 1 s  */

But, despite the existence of STM32G473xx devices without dual bank capability, which again was made apparent by the document linked above, FLASH_OPTR_DBANK is unconditionally defined in the cmsis device header file "stm32g473xx.h" (at line 5720).

So I would like know if I'm reading all this correctly, because I'm ready to eliminate the FLASH_OPTR_DBANK define and have the libraries employ what I assume would be the correct flash configuration.

1 ACCEPTED SOLUTION

Accepted Solutions
Chloe Meunier
ST Employee

Hello,

I read in the document that STM32G473 is category 3.

For more details you should download the Reference Manual :https://www.st.com/content/st_com/en/search.html#q=stm32g473cb-t=resources-page=1

On page 75 you will find the details features for each Category.

BR

Chloé

View solution in original post

2 REPLIES 2
Chloe Meunier
ST Employee

Hello,

I read in the document that STM32G473 is category 3.

For more details you should download the Reference Manual :https://www.st.com/content/st_com/en/search.html#q=stm32g473cb-t=resources-page=1

On page 75 you will find the details features for each Category.

BR

Chloé

Alright I missed that part of the reference manual. It definitely clears up my confusion from the presentation document.

Thanks!​