2020-04-27 12:52 AM
I've designed a board with stm32G431 MCU (i will include schematic if necessary) and now trying to test how it works. I am using CMSIS for programming and wrote the most simple blink program (LEDs are on PB3-6):
#include "stm32g431xx.h"
void delay(uint32_t time);
uint32_t someVar = 0;
int main(void)
{
RCC->AHB2ENR |= RCC_AHB2ENR_GPIOBEN;
GPIOB->MODER &= ~0x00003FC0;
GPIOB->MODER |= 0x0001540;
GPIOB->ODR |= 0x0078;
while ( 1 )
{
delay(300000);
GPIOB->ODR ^= 0x0078;
someVar += 1;
}
}
void delay(uint32_t time)
{
for ( uint32_t i = 0; i < time; ++i );
}
And when I debug it. It works just fine, but after I hit reset it doesn't work anymore. I checked with st-link utility. The program is still in flash. Can anyone explain what is going on and how to fix it?
Solved! Go to Solution.
2020-04-27 04:50 AM
Ok, I Fixed it. Problem was with boot0 as @Community member sad.
It is important to know that in my project pb8 (boot0 pin) is used as GPIO, and from the board design it is high without setups. So when I reset my board it was trying to boot from the SRAM (which is not what I wanted) so, to fix it is needed to setup MCU to always boot from Flesh. Which in my case was made as:
// Wait until flash is not busy anymore
while((FLASH->SR & FLASH_SR_BSY) == FLASH_SR_BSY){}
// Unlock flash memmory
FLASH->KEYR = 0x45670123;
FLASH->KEYR = 0xCDEF89AB;
FLASH->OPTKEYR = 0x08192A3B;
FLASH->OPTKEYR = 0x4C5D6E7F;
// Disable boot pin
FLASH->OPTR &= ~FLASH_OPTR_nSWBOOT0;
// Enable new steup
FLASH->CR |= FLASH_CR_OPTSTRT;
// Lock flash back
FLASH->CR |= FLASH_CR_OPTLOCK;
FLASH->CR |= FLASH_CR_LOCK;
All boot options are listed in stm32g4 Reference Manual in chapter 2.6
2020-04-27 01:05 AM
Disassembly shows some weird stuff in the beginning.
2020-04-27 01:14 AM
Yeah, that would be the vector table, a list of addresses, and not executable code you can disassemble.
Odd the FLASH basis isn't 0x08000000, but not my part.
Make sure your design pulls BOOT0 low.
2020-04-27 01:34 AM
In my design PB8 is used as GPIO and it has logic high without MCU setup. I tried to use:
FLASH->SEC1R |= FLASH_SEC1R_BOOT_LOCK;
But it hadn't helped yet.
2020-04-27 01:36 AM
In my design PB8 is used as GPIO and it has logic high without MCU setup. I tried to use:
FLASH->SEC1R |= FLASH_SEC1R_BOOT_LOCK;
But it hadn't helped yet. Sorry for comment duplication
2020-04-27 04:50 AM
Ok, I Fixed it. Problem was with boot0 as @Community member sad.
It is important to know that in my project pb8 (boot0 pin) is used as GPIO, and from the board design it is high without setups. So when I reset my board it was trying to boot from the SRAM (which is not what I wanted) so, to fix it is needed to setup MCU to always boot from Flesh. Which in my case was made as:
// Wait until flash is not busy anymore
while((FLASH->SR & FLASH_SR_BSY) == FLASH_SR_BSY){}
// Unlock flash memmory
FLASH->KEYR = 0x45670123;
FLASH->KEYR = 0xCDEF89AB;
FLASH->OPTKEYR = 0x08192A3B;
FLASH->OPTKEYR = 0x4C5D6E7F;
// Disable boot pin
FLASH->OPTR &= ~FLASH_OPTR_nSWBOOT0;
// Enable new steup
FLASH->CR |= FLASH_CR_OPTSTRT;
// Lock flash back
FLASH->CR |= FLASH_CR_OPTLOCK;
FLASH->CR |= FLASH_CR_LOCK;
All boot options are listed in stm32g4 Reference Manual in chapter 2.6