In the reference manual for the G474, under HRTIM Burst mode control register (HRTIM_BMCR), bit 31 is the BMSTAT register; it gives the current operating status of the burst mode feature.
But it states that writing this bit to zero causes early burst mode termination... and I don't think this is actually true. If I try to write to it, it seems to fail and doesn't actually enter burst mode.
Does bit zero, BME, control the burst mode CONTROLLER itself, aka, if burst mode entry is possible at all, or is that the actual bit I'm supposed to modify to exit burst mode?
Thank you.
