STM32G0B1CBT6 Dual Bank Upgrade, Unable to Write Flash when running on Bank2

[fsc1121]

Using Dual Bank for upgrade feature and the last 2K section of Flash is used to store configuration data.
When the program is running in Bank1, reading and writing the configuration data work. But when the program is running in Bank2, Cannot write the flash configuration data correctly.

[Imen.D]

Hello @fsc1121 

Which setting used for Prefetch and Cache? Do you have PREFETCH_ENABLE?

Maybe you have encountered the issue in Section 2.2.10 in this STM32G0B1xB/xC/xE device errata which says that prefetch on STM32G0B1 has a hard fault if dual bank is enabled. 

[fsc1121]

Hello Imen.D

      Thanks For your help, Cache and Prefetch  all enbaled. And I think my problem is not the same as in Section 2.2.10 in this STM32G0B1xB/xC/xE device errata .  Because if do use some areas of Flash for storage configuration functions (such as EEPROM used), upgrading with dual bank works. My question is that;

1. Does G0 dual bank mode supports using a portion of the bank area for storing real-time data which can be read and written during program running.

2. If point 1 support. What is the code difference between erasing, reading, and writing Flash between dual bank and  single bank. I do not find any information about it from the documents and demo.

[fsc1121]

Hello Imen.D

      Thanks For your help, Cache and Prefetch  all enbaled. And I think my problem is not the same as in Section 2.2.10 in this STM32G0B1xB/xC/xE device errata .  Because if do use some areas of Flash for storage configuration functions (such as EEPROM used), upgrading with dual bank works. My question is that;

1. Does G0 dual bank mode supports using a portion of the bank area for storing real-time data which can be read and written during program running.

2. If point 1 support. What is the code difference between erasing, reading, and writing Flash between dual bank and  single bank. I do not find any information about it from the documents and demo.