Hello, I'm working with a STM32G0B0CE part. I believe that the TRM definitions for RCC_CCIPR2->USBSEL are incorrect.
I was having trouble with USB, seemingly related to clock selection. I noticed in the LL HAL headers the following:
#define LL_RCC_USB_CLKSOURCE_HSE RCC_CCIPR2_USBSEL_0 /*!< PLL clock used as USB clock source */
#define LL_RCC_USB_CLKSOURCE_PLL RCC_CCIPR2_USBSEL_1 /*!< PLL clock used as USB clock source */
#define RCC_CCIPR2_USBSEL_Pos (12U)
#define RCC_CCIPR2_USBSEL_Msk (0x3UL << RCC_CCIPR2_USBSEL_Pos) /*!< 0x00003000 */
#define RCC_CCIPR2_USBSEL RCC_CCIPR2_USBSEL_Msk
#define RCC_CCIPR2_USBSEL_0 (0x1UL << RCC_CCIPR2_USBSEL_Pos) /*!< 0x00001000 */
#define RCC_CCIPR2_USBSEL_1 (0x2UL << RCC_CCIPR2_USBSEL_Pos) /*!< 0x00002000 */
This seems to indicate that USBSEL should be 0x2 for PLL and 0x1 for HSE.
RM0454 Rev 5 Page 165 indicates that 0x1 is PLL and 0x2 is HSE.
I have confirmed that USB is functional on my board when setting USBSEL to 0x2 and is not functional when using 0x1, so I believe that the HAL definitions are correct and the documentation is wrong.
I'm using an 8 MHz external oscillator and generating a 48MHz output from the PLL, so it is expected that the HSE should not work as a USB clock source.
