2019-11-06 05:56 AM
Using the STM32F769I-DISC1 evaluation board I am trying to use SAI1 to output a TDM audio stream. I know the CODEC doesn't support that format but my production board will need it.
When configured as master transmitter, I get good SCLK, data and frame sync outputs but do not see any output for MCLK. I have NODIV in the CR1 register cleared and have double checked the settings of the MCLK GPIO port. Protocol is set to FREE and the output FIFO is being supplied with data continuously.
Are there any other conditions needed to get MCLK working?
2019-11-06 05:57 AM
PLL's ?
2019-11-06 06:12 AM
If the documentation is correct, SCLK and MCLK are derived from the same input clock. Since SCLK is working I assume that source clock is good.