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STM32F767 and SPI communication without DMA

Pilous Droip
Senior
Posted on May 30, 2018 at 08:34

Hello friends,

I try SPI communication, and I have a problem. I only send data.... But how to receive it?

Connection is:

1. one master - one slave

2. Full duplex

Initialize:

LL_SPI_InitTypeDef SPI_InitStruct;

LL_GPIO_InitTypeDef GPIO_InitStruct;

LL_SPI_Disable(SPI1);

LL_AHB1_GRP1_EnableClockLL_AHB1_GRP1_PERIPH_GPIOA);

LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1);

/* SPI2 GPIO Configuration */

GPIO_InitStruct.Pin = LL_GPIO_PIN_5;

GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;

GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;

GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;

GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;

GPIO_InitStruct.Alternate = LL_GPIO_AF_5;

LL_GPIO_Init(GPIOA, &GPIO_InitStruct);

GPIO_InitStruct.Pin = LL_GPIO_PIN_7;

GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;

GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;

GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;

GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;

GPIO_InitStruct.Alternate = LL_GPIO_AF_5;

LL_GPIO_Init(GPIOA, &GPIO_InitStruct);

GPIO_InitStruct.Pin = LL_GPIO_PIN_6;

GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;

GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;

GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;

GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;

GPIO_InitStruct.Alternate = LL_GPIO_AF_5;

LL_GPIO_Init(GPIOA, &GPIO_InitStruct);

GPIO_InitStruct.Pin = LL_GPIO_PIN_4;

GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;

GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;

GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;

GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;

GPIO_InitStruct.Alternate = LL_GPIO_AF_5;

LL_GPIO_Init(GPIOA, &GPIO_InitStruct);

/* SPI1 parameter configuration*/

SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;

SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;

SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_8BIT;

SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;

SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;

SPI_InitStruct.NSS = LL_SPI_NSS_HARD_OUTPUT;

SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV64;

SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;

SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;

SPI_InitStruct.CRCPoly = 7;

LL_SPI_Init(SPI1, &SPI_InitStruct);

LL_SPI_SetStandard(SPI1, LL_SPI_PROTOCOL_MOTOROLA);

LL_SPI_EnableNSSPulseMgt(SPI1);

LL_SPI_SetRxFIFOThreshold(SPI1, LL_SPI_RX_FIFO_TH_QUARTER);

/* Configure SPI1 transfer interrupts */

/* Enable RXNE Interrupt */

LL_SPI_EnableIT_RXNE(SPI1);

LL_SPI_Enable(SPI1);

And function to write/read....

int32_t read_from_reg(SPI_TypeDef *SPI, uint8_t data, uint8_t *SPI_Data_receive)

{

LL_SPI_TransmitData8(SPI, data);

while (!LL_SPI_IsActiveFlag_TXE(SPI));

while (!LL_SPI_IsActiveFlag_RXNE(SPI));

while (LL_SPI_IsActiveFlag_BSY(SPI));

*SPI_Data_receive = LL_SPI_ReceiveData8(SPI);

return 0;

}

And I sent one byte and I don't receive anything. Any idea, how to receive some data from register?

#nucleo-f767zi #stm32f7-spi

Note: this post was migrated and contained many threaded conversations, some content may be missing.
20 REPLIES 20
Posted on May 30, 2018 at 13:14

Strange that the code shows initialisation with HARD_OUTPUT (the code must enable SSOE) and registers tell that SSI+SSM are one whereas they should be zero. Are you sure to run the right code ?

Posted on May 30, 2018 at 13:17

I modification my code to control NSS pin by software:

GPIO_InitStruct.Pin = LL_GPIO_PIN_4;

GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;

GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;

GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;

GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;

LL_GPIO_Init(GPIOA, &GPIO_InitStruct);

and here is my log scope, where I send 3 dummy and read 3 bytes.... 

🙂

 Now, it is work, but ......0690X0000060L17QAE.png
Posted on May 30, 2018 at 13:25

A modif the function to use : LL_SPI_NSS_HARD_OUTPUT

And now egister is set:

SSOE = 0x01

SSI = 0x01

SSM = 0x00

Posted on May 30, 2018 at 13:37

SR

  • RXNE = 0x01   /* here I see a problem ....*/

every 8 clock cycles the Rx register will have the value of the MISO pins.

and RXNE is set.

Posted on May 30, 2018 at 13:41

Well, the SPI has 4 words FIFO, so that you can write 4 times to DR in a row and the SPI shall generate the correct waveform with CE down for the duration of 4 time 8-bit characters. Can you observe that ? Then manage your reception.

Posted on May 30, 2018 at 13:50

Some peripherals like the nSS to be active between bytes,

But others like it to run over the whole command.

where is the nSS line trace ?

Posted on May 30, 2018 at 14:04

🙂

 NSS = CE on my picture. 
Posted on May 30, 2018 at 17:41

Can you see that nSS is not high then going low to start the command.

you need nSS to be high on startup.

Posted on May 31, 2018 at 13:00

If the same simple program works when PA15 is used as NSS, but not if PA4 is used as NSS, then it's time to talk to ST's support...

JW

Posted on May 31, 2018 at 15:16

I reconnected it back to PA4 and it's working.

Because my first test function was without LL_SPI_Enable/LL_SPI_Disable.