2018-04-20 05:41 PM
2018-04-21 05:41 PM
Hi Joerg, I just installed Eclipse IDE package recently and so it is currently set to default. But I will look for the effects of instruction catch enabled.
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2018-04-23 01:43 PM
This problem appeared with the chip ran under debug mode, and so today I thought might be it would be fine if I flash the chip with release configuration. After generated the .elf in the release folder, I went to target > program chip > but the tool does not provide the option to choose the release folder; only the debug folder is available. My co-worker has both the release and debug folders under target > program chip. Anyone know why I don't have the release folder?
2018-04-23 03:53 PM
You'll need to get familiar with the tool chain you have chosen and the multitude of settings in configuration, installation and metadata, that control what, where and how things are built.
If the project description file is in XML I suppose you could use a diff or merge tools to observe the differences between the two system.
Keil has option tabs controlling what directories output is directed too.
2018-04-23 06:34 PM
OK, I think here is the reason why the for() loop counter is so unpredictable. It seems the compiler might optimize or ignore a dummy loop as the for(n=0; n< 500; n++);
So I changed it to
for(n=0; n<100; n++) Temp = SPI2.DR; // read SPI2 data register (assuming 100X read would have the same delay as wished. This forced the tool not to ignore or did funny thing with the loop, and I got the consistence counting delay.
So the lesson learned is do not use an empty for() loop for delay -- it is unreliable.
Thank you all for trying to help.