STM32F7 Large SDRAM examples? F7-Disco clarification, half of SDRAM accessible

[bobert]

Posted on August 14, 2016 at 19:19

Hi,

I would like to utilize either a 128Mb or 256Mb, and someday, maybe even a 4Gb external SDRAM chip.  If they can just be swapped out on the board all the better.The F7-DISCO makes a point that due to design considerations only 64Mb is accessible on the 128Mb chip, but does not go into detail on what design change would be required to access the other half of the data.I can't find any other examples of large SDRAM FMC connection layouts and can't tell if it something like using the 17th data bit or having to use the full 32 bit bus width to get all the data.Can someone point me to some different configuration examples with different rams and sizes so I can wrap my head around this?ThanksRobert #stm32f7 #sdram

[Tesla DeLorean]

Posted on August 14, 2016 at 20:34

Half the data bus isn't connected.

Look at the EVAL series boards. Look at the F4 boards, like the STM32f469-DISCO

[bobert]

Posted on August 14, 2016 at 22:13

Thanks Clive that is exactly what I was looking for.

Is that a trick I can use with any size... that I can use a 256Mb chip with half the bus to address 128Mb,  address 256Mb on a 512Mb chip, etc, etc, and save those extra 16 pins if the ram price is right?

[Tesla DeLorean]

Posted on August 14, 2016 at 22:47

I think availability is often a stronger driver than prices, but they are often interconnected. ie you buy a very high running part, lots of people want/use it, price is driven by total volumes. SDRAMs go EOL quite frequently so it is preferable to use ones designed for PCs rather than more niche ones.

Things like SDRAM and LCD eat pins, some people don't like BGAs (hard to rework, more expensive board densities) Don't see you getting multi GB devices in the M7 designs, NANDs get there via a blocked/windowed architecture.

[Tesla DeLorean]

Posted on August 14, 2016 at 22:55

Seem to recall the STM32's supporting 2x 256 MB (2Gb)

a) There is a window in the address space b) There is the row/column/bank/width limit