STM32F7 Discovery's USART6 problem

bnarit · ‎2015-11-23

Posted on November 23, 2015 at 14:41

Hi.

I have problem on USART6 of the stm32f746-(ngh60 7ba3v vg z phl 3r 506)

on CR1-TXIE bit.

I have spent almost 3 days, checking on debugger and coding directly without HAL driver.

What I found is the TXIE interrupt masking bit that should blind the TXIE event in ISR is not prohibit the interrupt from occurring.

Is this the normal operation? If so, how could I disable Transmitting in USART?

I have try to disable by trying to CLEARING TE bit in CR1 register.

It flow correctly in debugger but not functioning,

no signal came out

there is signal came out but not clean .

Here is my experimental code, I have experiences on STM32F4,STM32F030 none of them have this kind of problem before.

void USARTx_IRQHandler(void)

{

if( UartHandle.Instance->ISR & 0x00000020) {

int I = UartHandle.Instance->RDR;

}else if( UartHandle.Instance->ISR & 0x00000080){

UartHandle.Instance->RQR |= 0x10;

UartHandle.Instance->CR1 &= ~0x00000080; //disable

TXIE

}else if( UartHandle.Instance->ISR & 0x00000040) {

UartHandle.Instance->ICR |= 0x40;

}else if( UartHandle.Instance->ISR & 0x00000010) {

UartHandle.Instance->ICR |= 0x10;

}else if( UartHandle.Instance->ISR & 0x00000008) {

UartHandle.Instance->ICR |= 0x08;

}

#stm32f7-hal-uart

Tesla DeLorean · ‎2015-11-23

Posted on November 23, 2015 at 15:29

The Interrupt Enable merely masks the status being feed into the IRQ generation logic, if the USART Transmit Buffer is empty it's going to signal TXE, and it will appear in the status as such, and would be recognized as a ''source'' in the IRQ handler unless you IGNORE it. What shouldn't happen is it generating an interrupt, it might get in the handler for other reasons, ie RXNE, errors, etc.

This allows for the IRQ Handler to push data into the Transmit Buffer if underlying buffers on the software side now have data to send.

Staring at the register in the debugger is going to be invasive. ie reading/viewing the DR will alter the SR, etc.

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bnarit · ‎2015-11-23

Posted on November 24, 2015 at 05:26

Thank ,

I have found my own mistake. I should have clear all the interrupt by writing 0x3ffff to ICR.

I know this is not a good or preferable solution, I will re-wrapping it later.

However, I still not understand why they have to directly wiring the TXE flag. Normally, the TXE Flag should be trigged by the TDR empty event only once.