Posted on June 04, 2015 at 06:39Just got a STM32F429 Discovery board and am seeing something weird when implementing an SPI driver in master mode. I'm writing the SPI driver code from scratch and am not using a peripheral library.
The SPI peripheral (I'm using SPI1) seems to mangle the least significant bit on nearly every transfer. It either returns a '1' when the bit should be '0', or vice versa.
For example, then the slave is returning 0xff, the SPI peripheral DR register contains 0xfe. The MISO line really does have 0xff on it and I've verified this with a logic analyzer and scope. In fact, MISO is high well before and well after the eight clock pulses, so this isn't related to having CPOL/CPHA set wrong.
Anyone have any idea what may be going on here? This problem seems very consistent and is easily reproducible, but I haven't had any success determining the cause and a fix.
