I'm using STM32H7S78-DK and STM32CubeIDE v1.17.0. I was try to get Segger RTT working so I switched from ST-Link GDB server to OpenOCD because it has in-built RTT telnet server, but couldn't because OpenOCD didn't find RTT area.
I reduced the problem down to this simple example and realized it's related with data cache:
volatile uint32_t test = 1;
int main(void)
{
test = 2;
SCB_EnableDCache();
test = 3;
HAL_Init();
When debugging it with ST-link "test" will be 3 at line 8. When running with OpenOCD, test will remain 2. When not enabling cache, "test" will be 3.
I used default CubeIDE OpenOCD configuration and checked all the flags. I haven't had a problem with OpenOCD and STM32H5/H7 series with enabled cache before.
I found similar issue report from SO: https://electronics.stackexchange.com/questions/552477/debugging-cortex-m7-with-data-cache
There's one answer saying to monitor using_hla. I didn't get any response for that command in GDB console.
