STM32F429 GPIO 5V tolerant IO behavior

[sk-st]

Hello,

i use at a STM32F429 the PD5 pin to drive a PNP BJT transistor to switch a sensor supply:

PD5 is configured as open drain, and when the stm32 is pulling PD5 low, the transistor supplies the sensor with 5V power. This works so far.

But when PD5 is in open drain, the voltage at PD5 is 3,97V and at the transistor base it is 4,39V.

So there is a current of 4,2µA from the transistor base into PD5 pin. This is too much for the transistor for switching off.

The behavior would be explainable when PD5 would be a "normal" IO-Pin:

3,97V is around 3,3V plus the internal protection diode.

But PD5 is a FT GPIO Pin, 5V tolerant I/O.

The datasheet specifies a maximum Ilkg at Vin = 5V of 3µA.

So at 4V we are already >4µA.

The behavior is the same when PD5 is configured as input.

Internal pull up/down is iswitched off.

What do you mean?

[waclawek.jan]

> Internal pull up/down is iswitched off.

I don't believe. Read out and post content of GPIOD registers.

Also, what board is this - a "known good" like Nucleo or Disco, or your own? Is there anything else connected to that pin?

Isn't there some soldering residuum or something similar between the pin/resistor and ground, with equivalent resistance of cca 1MOhm?

JW

[AScha.3]

Hi,

you CANNOT switch 5V hi-side with a 3v3 cpu p-p output.

Thats it.

Maybe there is one way: if using FT pin (5v tolerant), as open drain, then possible this way:

[sk-st]

Right. I switch it only Low-Side. The pin is configured as open drain.

It is a custom board. And no there is nothing else connected to this pin.

For this voltage drop across the resistor there has to flow a current through the resistor.

[AScha.3]

see my edit.

+

Some uA "off" current is always in every semiconductor.

[Andreas Bolsch]

Regardless of the leakage current, be it 3uA or 4uA: This is poor design, as leakage current can grossly vary with test conditions (e.g. temperature), and current gain of a BJT is a rather poorly controlled parameter. I.e., if 4.2uA is too much to keep the transistor "off", you won't go away with 3uA either if you take another transistor of same type with a slightly higher current gain (just by chance). You need an additional resistor from base to emitter to overcome the leakage current (plus generous safety margin). See e.g. https://www.ti.com/lit/ds/symlink/ulq2004a.pdf, p. 12. (as these are NPN, voltage level are reversed, but the general principle is the same).

[MM..1]

Little Elearning bipolar tranzistors is open aka Ube. Then for valid closed npn base require resistor to ground .

On pnp base require resistor to 5V.

[AScha.3]

Did you try my circuit version ?

I just tested on a F303 , at PA15 , open drain, nopull, hi-output, 3,29VDD :

20nA leak at 4,73V ("5V" from USB) ;

but anyway, R1 is needed, to keep pnp OFF at all temperatures etc.

R2 can be 20k...2k , depends on current , you want Q1 to pull.