STM32F427 SPI Enable control

[TFuji.5]

Hello

We select the STM32F427 for new product and use the SPI slave function.​

We want to control the SPI enable/disable for the data input control.(SPI_CR1 bit6 SPE)

Can the STM32 SPI function receive the data immediately after SPI enabling?​

Are there certain time constraints in this matter?

[TDK]

The clock needs to be on its idle state and probably one clock tick needs to occur such that the level registers. But no extended wait or anything.

[Imen.D]

Hello @TFuji.5​ and welcome to the Community,

I adivse you this AN5543 "Enhanced methods to handle SPI communication on STM32 devices". This document provides tips on how to prevent, and how to manage, the most frequent difficulties encountered when handling SPI communications.

Hope this helps you !

When your question is answered, please close this post by choosing "Select as Best". This will help other users find that answer faster.

Imen

[TFuji.5]

Dear TDK-san

Thank you for your reply.

I think the so, too. The spi controller can receive the data after one clock(spi controller internal clock) after SPE enable.

Dear lmen-san

​Thank you for your reply.

Sorry. I checked the AN5543 document and couldn't find the timing spec(From SPE enable to the ready for receiving).

[MasterT]

Datasheet: https://www.st.com/en/microcontrollers-microprocessors/stm32f427-437.html#documentation

page 144 Table 62. SPI dynamic characteristics defines:

t su(NSS) NSS setup time Slave mode, SPI presc = 2 4T PCLK

I'm not sure, if logic re-triggering would require more time with lower baudrate, like

( t baud_rate /2 ) + 4 × t pclk.