STM32F417 DAC offset

[New.Fish]

I'm using STM32F417 MCU for our system design, DAC1 and DAC2 is employed to output variable DC voltage, but both channel has about 50mV offset ( Set_DAC_Out1(0); ). In the user datasheet, there is no register related to adjust offset.

Is there anyone has good idea to deal with the offset? Any suggestion will be welcome.

[AvaTar]

The DAC has an output buffer you can either enable or leave disabled.

With disabled buffer, it has about 1 MOhm output impedance and very little offset.

With enabled buffer, it has 15kOhm output impedance, but up to 200mV offset.

Check the datasheet.

[New.Fish]

Thanks. It works. The offset goes to 1mV to 2 mV which is acceptable. Many thanks.

Here is the code:

void Set_DAC1_OutputBuffer(unsigned char Enable)

{

DAC_ChannelConfTypeDef sConfig;

if(Enable){

sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;

}else

{

sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_DISABLE;

}

HAL_DAC_ConfigChannel(&hdac, &sConfig, DAC_CHANNEL_1);

}

[AvaTar]

The DAC of the STM32 is quite simple, but has some not-so-pleasant facts hidden in the datasheet.

The first is the mentioned choice between either very high impedance or high offset.The second surprise settling times in the 2ms...5ms range. This limits the usable bandwidth to about 100kHz, far below the possible internal throughput to the DAC output register.

Integration of a DAC with high-speed digital logic is always a compromise, and ST could have done worse.

For higher demands, an external DAC is always an option.