2019-01-12 10:53 AM
ISR vector table in SRAM works, but not in CCM. Is this possible? If not, what is the theory behind it? Vector fetching done through I-Bus or S-Bus?
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2019-01-12 12:18 PM
Vectors are fetched through the same bus as instructions, i.e. I-Bus or S-bus depending on the address (0x20000000 being the boundary). I know of no explicit quote for this, but there are hints throughout the documentation (e.g. that vector fetches occurs in parallel with state storing; this literally can occur only if the vector table is mapped at below 0x20000000).
CCM in 'F4xx is on D-bus.
JW
2019-01-12 11:04 AM
I think it's an I-Bus fetch
2019-01-12 11:53 AM
Thanks for the info. Do you have any document pointers?
2019-01-12 12:18 PM
Vectors are fetched through the same bus as instructions, i.e. I-Bus or S-bus depending on the address (0x20000000 being the boundary). I know of no explicit quote for this, but there are hints throughout the documentation (e.g. that vector fetches occurs in parallel with state storing; this literally can occur only if the vector table is mapped at below 0x20000000).
CCM in 'F4xx is on D-bus.
JW
2019-01-12 01:51 PM
Got it. The parallelism is the key evidence, I guess. Thanks.