STM32F4 SAI data latch

Hello

​

​Our new product use a STM32F427 and a ADC(AD7768-4) the data input connection is the SAI(serial audio interface). The STM32F4 SAI mode is the slave mode.​

​

The ADC sends SAI_SD signal and SAI_FS at rising edge.

Therefore, we think that the STM32F4 clock strobing is the falling edge.

​Is our understanding of this correct?

Does the STM32F4 clock strobing edge mean the SAI_SD signal and SAI_FS latching point?

​

​