2012-12-07 12:40 AM
Hi,
I have my own homemade board designed from a STM32F4 in LQFP100. It is supplied by +3.3V power. The JTAG is connected like that : - TMS : p.72 - TCK : p.76 - TDO : p.89 - TDI : p.77 - nRESET : /reset ie p.14 TMS,TDO and TMI have a pull-up (10k). TCK have a pull down (10k). First thing, when powering ON, the 8MHz quartz don't oscillate (JSX75 populated with 12pF). I tried to programm and it don't found the MCU. (I'm programmating with ST-Link V2 and use this :http://fr.mouser.com/ProductDetail/Embedded-Artists/EA-ACC-040/?qs=sGAEpiMZZMv/bGM7XKYHK8bLVU3QviTN
). I'm using EWARM. I check the +3.3V -> Ok Boot0 is connected to +3.3V via à 10k resistor. -> Ok Z revision, so no PDR_ON pin (replaced by vss). Any idea? Any suggestions? I'm gonna be desperate...2012-12-07 04:38 AM
Make sure the VSSA/VDDA are connected.
Check level on NRESET. Check VCAP pins/caps. The part starts using HSI, the HSE crystal will not start unless running code enables it. Provide a schematic if you want real suggestions not guesses.2012-12-07 05:20 AM
Vdda was, for me , only for analogic power, isn't it?
Anyway, i just have connect it to the +3.3V. Plus, i have suppress the 3 pull-ups and the pull-down on the j-tag connector. ________________ Attachments : STM32F407.pdf : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I0gQ&d=%2Fa%2F0X0000000bdc%2Fjy2s52n48p.QnKnWWd28_hzdEVvC9D.l2OFtlP.D6Js&asPdf=false2012-12-07 07:01 AM
VDDA is connected to the power on reset circuit, so it will be a problem for you. Check if NRESET is clamped to ground.
VBAT is recommend as being connected to VDD via 100nF ceramic cap in the absence of a battery.2012-12-07 07:40 AM
Thks.
So now, i have : - Vdda connected to Vdd - Vbat connected to Vdd nReset seems to be always on 3.3V... Strange, isn't it? I just tried to connected the output of SWD from STM32Discovery to my jtag connector. Same thing. The discovery board is working, so i believe the problem come from my board...2012-12-07 08:00 AM
I'm looking at the four signal of SWD.
When working with the discovery, the SWO (I/O) is active before the reset. I can see some kind of exchange between the TMS320 and the embedded ST-Link before a reset. When connecting my board to the ST-Link (embedded by the Discovery), i just see 5 or 6 edge on this signal. It is like the St-link ask and my STM32F4 doesn't answer...2012-12-10 12:05 AM
Sorry for the three-post replay, but i'm still looking for a solution...
For the SWD, I have connected the pins like that : Discovery -> My board: CN2.2 : T_JTCK -> J7.4 : TCK CN2.3 : GND -> GND CN2.4 : T_JTMS -> J7.2 : TMS CN2.5 : T_NRST -> J7.10 : /RESET CN2.6 : T_SWO -> J7.8 : TDI Did I'm doing it good?2012-12-10 07:09 AM
Shouldn't SWO be connected to JTDO?
Make sure you check the solder bridges on the back of the STM32F4-Discovery board. Personally I wouldn't be using a ST-LINK a my primary JTAG/SWD reference pod. I'd use a more commercial device with a standard 10 or 20-pin ARM connector, and cross check it on a known working platform. Alternate methods of detecting signs-of-life would be via USART1 or USART3 when BOOT0=1, you should be able to send an 0x7F at 9600 8E1 and get a 0x79 response. If the device is dead in the water JTAG/SWD isn't going to help. Other than the power supply connections the schematic looks reasonable, and 10-pin JTAG/SWD connector looks to be Ok. Make sure the header is correctly orientated, ideally use an off-the-shelf cable/adapter to connect to your JTAG pod. Check the placed components are correct, and there are no solder shorts, or opens in the PCB. The 22uF bulk cap seems on the high side, but I can't see that stopping it functioning. Make sure the VCAP capacitors are in fact 2u2F, we've had posters here place 2n2F and have problems.