Posted on February 14, 2016 at 11:06To expand on that, in the ST chips there is the ARM processor, designed by ARM and the peripherals designed by ST. So on AVR it might be possible to ''feedback'' the ''interrupt processing has begun'' part from the CPU to the peripheral, while here that would be outside of the interface between the modules.
In general, interrupts are ''unexpected'' events. You can make the interrupt module ''edge senstive'' or ''level sensitive''. In the last half-century we've learned that ''edge sensitive'' is not a good idea. Before you know it, the device is still requesting service (keeping the signal active), but the CPU just missed the event and returns from the interrupt routine. So then there are no more edges, no more interrupts and a peripheral with data that is never examined. So interrupts must be level-triggered to be reliable, which leads to the interrupt storm that you observed if you forget to indicate ''i've handled the interrupt'' to the module.
