STM32F107 TIM4: writes to CR1 also write to DMAR

[DiBosco]

Posted on October 27, 2016 at 15:02

Folks,

Has anyone seen this bizarre behaviour where if you write to a timer's CR1 register it also writes to the DMAR register? I have this utterly bizarre thing going on where my timer interrupt was going off at the wrong interval and nothing I did would stop it. Eventually I noticed the DMAR register had 5 in it which, if I manually changed it to 0 with the debugger, stopped the interrupt going off. Every time I change the CR1 register I have to write 0 to the DMAR register otherwise I get incorrect interrupts. The big problem is that if I then write 0 to DMAR to stop getting these 1ms interrupts (no idea why that should happen either), then the timer is switched off. Is this a known bug? More to the point, how on earth do I stop this happening please? I can't see anything in the errata. Thanks! Rob

[waclawek.jan]

Posted on October 27, 2016 at 15:17

TIMx_DMAR is not a register - it's a ''window'' into other TIM registers for indirect accesses, addressed by TIMx_DCR.DBA.

It's something else you are doing wrong. JW

[DiBosco]

Posted on October 27, 2016 at 15:35

OK, I see what you mean. I thought I'd changed the ARR value and it had made no difference, but I was wrong.

Long and short is that even with only CCR2 int enabled, it's interrupting when the timer hits ARR value and it's that that is causing me issues. Thanks, Rob

[waclawek.jan]

Posted on October 27, 2016 at 16:13

Is this the source of your problems?

When the contents of TIMx_CCR1 are greater than the contents of TIMx_ARR, the CC1IF bit goes high on the counter overflow (in upcounting and up/down-counting modes) or underflow (in downcounting mode). JW