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STM32F105RBT6, PB3 not working as GPIO push-pull output with application using firmware package 1.8.x but works fine with similar app using firmware package 1.7.0

FLACO.1
Associate II

Hi

I have an application that uses an STM32F105RBT6 ant its USB peripheral as host mode connected to a HID controller, and driving a few GPIOs connected to 74HC04 inputs.

The application was created using firmware package 1.7.0 and STM32CubeMx with a Makefile and linux toolchain.

The application has been enhanced on a F205 board with STM32CubeIDE, where it is working well, and the enhancements are being backported to the F105 with 1.8.4 firmware package. I write "backported" however it is mostly the same code, but the pinouts are different.

There, I have a strange behavior :

PB3, pin 55 on the package, which is a simple Push-pull GPIO output, does not work on the updated app with 1.8.x firmware with the F105 board. What is strange is that on the scope it is stuck flat to a 0.3v level, which is slightly higher than the other outputs at their low level : as if the pin was not set like the others.

The outputs are set just with the generated HAL configuration and HAL WritePin inside the USBH process loop.

   HAL_GPIO_WritePin(B_UP_GPIO_Port, B_UP_Pin, !gamePorts[1].u); <- u,d,l,r are uint8_t in the gamePorts struct

   HAL_GPIO_WritePin(B_DOWN_GPIO_Port, B_DOWN_Pin, !gamePorts[1].d);

   HAL_GPIO_WritePin(B_LEFT_GPIO_Port, B_LEFT_Pin, !gamePorts[1].l);

   HAL_GPIO_WritePin(B_RIGHT_GPIO_Port, B_RIGHT_Pin, !gamePorts[1].r); <- this is the PB3 pin not working

- All the other GPIO outputs are working as intended.

- The problem is the same on all the F105 boards I tried, and all of these boards are working when they are downgraded with the old 1.7.0 application, so it seems this is not a hardware problem (bad chip, solder joint, pcb).

- Changing the order of WritePin calls changes nothing.

- When swpapping the values that are written to these outputs, the other GPIO are working well with the swapped values, but still not this PB3 "B_RIGHT_Pin".

- When debugging the app and, using STM32CubProgrammer, dumping memory of the "gamePorts" structure that stores the values that are applied to the GPIO output, all the values are correct.

- The pin configuration in gpio.c seems OK, identical to the others.

- This is not a define/naming problem, HAL_GPIO_WritePin(GPIOB, GPIO_PIN_3, (gamePorts[1].r?GPIO_PIN_RESET:GPIO_PIN_SET)) does the same.

- The only peripherals that are used are TIM7 and USB_OTG_FS/USB_HOST, and GPIOs at low speed with a few interrupts. All are set through the STMcubeIDE graphical interface.

I have tried firmware package 1.8.4 and 1.8.0 and both have the same result.

I have read the STM32F105 device errata but nothing seems relevant.

Everything else in the application works fine (especially usb setup and communication), it is frustrating to be blocked by something apparently so trivial.

By chance would someone have a clue or ideas of other things to try ?

1 ACCEPTED SOLUTION

Accepted Solutions

PB3 is TDO/SWO, make sure to check how the JTAG-DP / SWD-DP mapping is set up on the F1 parts.

Check also DBGMCU_CR

Pretty sure the RM will have specific details

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View solution in original post

3 REPLIES 3

PB3 is TDO/SWO, make sure to check how the JTAG-DP / SWD-DP mapping is set up on the F1 parts.

Check also DBGMCU_CR

Pretty sure the RM will have specific details

Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..
FLACO.1
Associate II

Dear Tesla DeLorean,

You are absolutely correct !

pin 48 and 49 were reserved in the project as SYS_JTMS-SWDIO and SYS_JTCK-SWCLK howerver SYS/Debug was set as "no debug".

I enabled SYS/Debug="Serial Wire" and it added "__HAL_AFIO_REMAP_SWJ_NOJTAG();" inside stm32f1xx_hal_msp.c with the comment "NOJTAG: JTAG-DP Disabled and SW-DP Enabled". And now PB3 acts as the intended output.

I have to check inside the reference manual as you say.

However :

  • the project fot the F205 is set the same with "No Debug" and PB3 acts correctly as an output, even if it is also TSO/SWO there as well.
  • I find it quite tricky that the pin is affected to a debug feature when debug is set as disabled.

Anyway thank you very much, my application is working well now !

It could be how CubeMX generates, or modes the debugger negotiates into during programming, etc.

Could perhaps see what behaviour does from a cold start, and no debugger connection.

The F1 is also a very old and quirky part, by the time the F2/F4 arrived some of the dumber ideas from the prior design were addressed. The pin muxing/mapping being one of the primary ones. I'm not sure how much is it worth to dig into it these days, and I don't think significant regression testing is done with CubeMX spanning all possible uses cases. Given all the other pots on the stove now, I don't think ST's particularly focused on F1's

My goal was really just to identify the primary cause based on the symptoms. I was using the SPL back in the day, not the HAL

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