STM32F103 UART and USART clock configuration

[IvanOrot]

I am working on a project that uses STM32F103 and STM32G4 as MCUs. They need to communicate between each other using UART. I am trying to configure STM32F103 UART clocks to match the STM32G4's clocks but I have not been able to figure out where to do that. I found a document that says UART clock is based on HCLK, but is there any prescaler that configures the UART clocks? If not, what is the frequency the UART clocks are based in so I can match it by configuring the STM32G4s clock, instead.

To be more specific, I am using all ports as asynchronous. USART1, USART2, USART3, UART4, and UART5.

[Danish1]

Everything is fully described in the Reference Manuals for your stm32s. They will be different because the G4 are much more modern and so have many more capabilities than the F1. So you will have to study both of them to understand what is going on.

Because the RM is complete, it is complicated and hard to get your head around first time. So ST produce their "Cube" tools that hide the complexity and possibly limit your choices. But I find them inadequately documented and stick with RM where I can.

In general, a UART will use a fractional-n divider to generate a baud-rate-clock from the incoming clock (which may be a PCLK - either PCLK1 or PCLK2 depending which UART) or HCLK or SysClk. I expect G4 to also support clocks directly from the HSI/HSE oscillator so that the baud-rate does not need to be recalculated should you change the CPU speed on-the-fly to save power when there isn't much processing to do.

The output from the baud-rate-clock needs to be 16 times the actual baud-rate, so that the UART may sample the input three times in the centre of the bit-period to reduce noise-susceptibility while giving tolerance to baud-rate errors. (There are sometimes options to work at 8 times as well where you want high baud-rates in relation to the baud clock).