2015-01-02 01:53 AM
My Flash is divided into 3 parts first part of code only decide that which part
is active b/w the remaining two parts and jumps to the active part accordingly. The remaining inactive part is for remote firmware update. When there is remote update it erase the inactive part and program it and shifts to new overlay and mark this as active. If there is remote update again it erases the other part and program again in this whole process first part of code remains unchanged switching happens only b/w 2nd and 3rd part.Earlier this process is working fine but now i have introduced USB in my application. Earlier I was working on 64 Mhz clock now I working on 72 Mhz because of USB requirement. After introducing 72 Mhz clock i am facing problem related to erasing flash.Earlier code for 64 Mhz is// PLL Configure for 64 MHz rRCC_CFGR |= 0x00380000; //PLL input Clock Multiply By 16//PLL Turn On rRCC_CR |= RCC_CR_PLLON; //PLL oscillator ON uart1_printf_debug(''PLL Turn ON\n''); while (!(rRCC_CR & RCC_CR_PLLRDY))//Wait Till PLL Oscillator ready ; uart1_printf_debug(''PLL Stable\n''); rRCC_CFGR |= RCC_CFGR_SW_PLL; //PLL selected as system clock// Reinitialize UART for 72 MHz init_uart1_debug(64000000, 115200); uart1_printf_debug(''\nPLL (64 MHz) In Use as System Clock\n'');New Code for 72 Mhz rRCC_CR |= RCC_CR_HSEON; // HSE oscillator ON uart1_printf_debug(''HSE Turn ON\n''); while (!(rRCC_CR & RCC_CR_HSERDY)) //Wait Till HSE Oscillator ready ; uart1_printf_debug(''HSE Stable\n''); // PLL Configure for 72 MHz rRCC_CFGR |= (RCC_CFGR_PLLMULL6 | //PLL input Clock Multiply By 6 RCC_CFGR_PLLSRC); //Clock from PREDIV1 selected as PLL input clock //PLL Turn On rRCC_CR |= RCC_CR_PLLON; //PLL oscillator ON uart1_printf_debug(''PLL Turn ON\n''); while (!(rRCC_CR & RCC_CR_PLLRDY)) //Wait Till PLL Oscillator ready ; uart1_printf_debug(''PLL Stable\n''); rRCC_CFGR |= RCC_CFGR_SW_PLL; //PLL selected as system clock // Reinitialize UART for 72 MHz init_uart1_debug(72000000,115200); uart1_printf_debug(''\nPLL (72 MHz) In Use as System Clock\n''); //HSI Turn Off rRCC_CR &= ~RCC_CR_HSION ; uart1_printf_debug(''HSI Turn Off\n'');after shifting to 72 Mhz when i try to erase flash my code get hang up.but it is working fine with 64 Mhz. #stm32-flash2015-01-02 02:55 AM
My Flash is divided into 3 parts first part of code only decide that which part
is active b/w the remaining two parts and jumps to the active part accordingly. The remaining inactive part is for remote firmware update. When there is remote update it erase the inactive part and program it and shifts to new overlay and mark this as active. If there is remote update again it erases the other part and program again in this whole process first part of code remains unchanged switching happens only b/w 2nd and 3rd part. Earlier this process is working fine but now i have introduced USB in my application. Earlier I was working on 64 Mhz clock now I working on 72 Mhz because of USB requirement. After introducing 72 Mhz clock i am facing problem related to erasing flash. Earlier code for 64 Mhz is// PLL Configure for 64 MHz
rRCC_CFGR |= 0x00380000; //PLL input Clock Multiply By 16
//PLL Turn On
rRCC_CR |= RCC_CR_PLLON; //PLL oscillator ON
uart1_printf_debug(''PLL Turn ON
'');
while (!(rRCC_CR & RCC_CR_PLLRDY))
//Wait Till PLL Oscillator ready
;
uart1_printf_debug(''PLL Stable
'');
rRCC_CFGR |= RCC_CFGR_SW_PLL; //PLL selected as system clock
// Reinitialize UART for 72 MHz
init_uart1_debug(64000000, 115200);
uart1_printf_debug(''
PLL (64 MHz) In Use as System Clock
'');
New Code for 72 Mhz
rRCC_CR |= RCC_CR_HSEON; // HSE oscillator ON
uart1_printf_debug(''HSE Turn ON
'');
while (!(rRCC_CR & RCC_CR_HSERDY)) //Wait Till HSE Oscillator
ready
;
uart1_printf_debug(''HSE Stable
'');
// PLL Configure for 72 MHz
rRCC_CFGR |= (RCC_CFGR_PLLMULL6 | //PLL input Clock Multiply
By 6
RCC_CFGR_PLLSRC); //Clock from PREDIV1 selected as
PLL input clock
//PLL Turn On
rRCC_CR |= RCC_CR_PLLON; //PLL oscillator ON
uart1_printf_debug(''PLL Turn ON
'');
while (!(rRCC_CR & RCC_CR_PLLRDY)) //Wait Till PLL Oscillator
ready
;
uart1_printf_debug(''PLL Stable
'');
rRCC_CFGR |= RCC_CFGR_SW_PLL; //PLL selected as system
clock
// Reinitialize UART for 72 MHz
init_uart1_debug(72000000,115200);
uart1_printf_debug(''
PLL (72 MHz) In Use as System Clock
'');
//HSI Turn Off
rRCC_CR &= ~RCC_CR_HSION ;
uart1_printf_debug(''HSI Turn Off
'');
after shifting to 72 Mhz when i try to erase flash my code get hang up.
but it is working fine with 64 Mhz.
2015-01-02 02:57 AM
Would like to add that 64MHz at which flash erase works is using HSI and 72MHz at which flash erase hangs up the controller works using HSE.
2015-01-02 05:32 AM
2015-01-02 05:55 AM
Not sure of the context in which these floating blocks of code are called. Doesn't seem to be anything setting the flash wait states or APB/AHB clocks. Also just ORing stuff into registers can lead to all kinds of problems if there are bits already set. You should perhaps mask the bits you want to ensure are clear, and then OR the ones in you want set.
2016-01-03 09:22 PM
The MCU hangs in the function
1.
FLASH_Status FLASH_ErasePage(uint32_t Page_Address)
at the line
1.
rFLASH_CR |= CR_STRT_Set;
Before calling the flash erase function following are executed
/*Unlock Flash*/
FLASH_UnlockBank1();
/* Clear All pending flags */
FLASH_ClearFlag(FLASH_FLAG_EOP | FLASH_FLAG_PGERR | FLASH_FLAG_WRPRTERR);
This works properly for clock setting of 64Mhz HSI but fails at 72Mhz HSE. I need HSE because I am using USB.
Regards
2016-01-05 01:29 AM
FLASH ERASE/OPERATIONS REQUIRE HSI to BE ON! PROBLEM SOLVED
2016-01-05 01:41 AM
Dear Vineet,
try with follwing code-- RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ while(1){ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if(HSEStartUpStatus == SUCCESS) break; } if(HSEStartUpStatus == SUCCESS) { RCC_HCLKConfig(RCC_SYSCLK_Div1); RCC_PCLK2Config(RCC_HCLK_Div1); RCC_PCLK1Config(RCC_HCLK_Div2); FLASH_SetLatency(FLASH_Latency_2); FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); #ifdef 16MHZ RCC_PLLConfig(RCC_PLLSource_HSE_Div2,RCC_PLLMul_9);//for HSE //16MHz #else if defined 8MHZ RCC_PLLConfig(RCC_PLLSource_HSE_Div1,RCC_PLLMul_9);//for HSE //8MHz RCC_PLLCmd(ENABLE); while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {} RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); while(RCC_GetSYSCLKSource() != 0x08){} } This is tested code.