2015-06-24 06:26 AM
I am having a problem with STM32F100RC microcontroller related to the chip revision. It appears that TIM14 which I use is not presented in a new batch of chips. Old ones are marked STM32F100RCT6B rev. A and they work fine. The new ones are marked STM32F100RCT6 (without the 'B' which is some kind of internal code for ST according to the datasheet) and the revision is X. With the new batch it is not possible to enable TIM14 clock in RCC_APB1ENR register. The bit cannot be set by software. TIM14 registers also cannot be modified. Errata document states it is only valid for revision A chips and I could not find any information about revision X ...
2015-06-29 02:38 AM
Hello Kruger,
To be sure about the used revision of STM32F100 device, please check the exact the value of ''DEV_ID'' field in DBGMCU_IDCODE register (0xE0042000):- If the value is 0x420 or 0x428, refer to RM0041
- Otherwise, refer to RM0008.
Based on the reference manual content, you can verify if TIM14 is available on your device or not.TIM14 is available only on devices with DEV_ID: 0x430 or 0x428.-Mayla-
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2015-06-29 06:18 AM
2015-06-29 07:08 AM
What's the RAM size specified in the half-word at 0x1FFFF7E2?
As for TIM14, thehttp://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/CD00212417.pdf
certainly seems to indicated that the part should have this feature.2015-06-29 08:18 AM
It reads 0xFFFF at location 0x1FFFF7E2. This chip seem to be STM32F103RC (lack TIM14) in STM32F100RC marked package (bad batch) judging by the IDs and this doc is only valid for STM32F100.
I have STM32F100RC from old batch for comparison. It has DEV_ID 0x428, REV_ID 0x1000 which is by the book. But this one reads DEV_ID 0x414 and REV_ID 0x1003