2018-05-10 01:37 AM
Hi folks,
I just looked at the linker script generated by CubeMX for a STM32F205RB. The bits I'm concerned about;
/* Highest address of the user mode stack */
_estack = 0x20010000; /* end of RAM */
/* Generate a link error if heap and stack don't fit into RAM */
_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */
/* Specify the memory areas */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K
}�?�?�?�?�?�?�?�?�?�?�?�?
The RB does indeed have 64K of RAM, but it's split across SRAM1 and SRAM2. SRAM1 starts are 0x20000000 but should only be 48K long. Unless I've misunderstood something SRAM2 should be a new section starting at 0x2001C000 with length 16K (Figure 16, Pg 68 of the datasheet DocID 15818). At the moment the location of _estack seems to be in memory that doesn't exist, and should really be at 0x2000C000.
I suspect this is working due to die sharing but if you're trying to make a reliable product using RAM that's not tested/certified is not a good idea.
Did I misunderstand something, or is this a bug in CubeMX?
Dave
2018-05-16 08:22 AM
Hello
marples.dave
,Please precise which CubeMx version used, this will help us to check your issue.
Best Regards,
Imen.
2018-05-16 08:49 AM
All the F2 die have 128KB of RAM, the separation of SRAM1/SRAM2 is a notional, and confusing thing. There is an admission to this on the forum somewhere, along with a definitive statement all 128KB is tested on all devices. Request something from your FAE if that provides additional comfort.
There is some special mapping of SRAM2 (0x2001C000) vs USB as I recall, and that is fixed in silicon.
F2 linker scripts across IAR, KEIL, and GNU have described ALL possible memory permutations, so pretty much needs to be 128KB there or the house of cards falls down.
The GNU/GCC Linker Scripts in this regard are also very confusing. The linker maps out specific memory based on the sizes, and then the value is explicitly set to something else.
2018-05-16 09:50 AM
Hi
Marples.Dave
,Thanks for rising this issue, it will be fixed for a next release
2018-05-16 10:52 AM
I would expect a subset of the FLASH to be tested on the 'smaller' F2 devices, primarily due to the long and expensive on-tester time that would consume. ie I would expect 3-4 256KB devices could be tested in the time a 1MB device could be, and this impacts the yield/throughput of the capital equipment.
2018-05-16 11:26 AM
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