SPI Slave on STM32G030F6 is not working

[JCho.3]

Hi, This is my first time here to write a post.

I want to implement a system that connnects a STM32H723(master) and four STM32G030F6P6s(slave) via SPI communication. I connected  them and I check the SPI signals from STM32H723(NSS, SCK, MOSI). The Signals are fine.

The problem is that any of STM32G030F6P6 doesn't work. More precisely, I don't know how to setup STM32G030 SPI as a slave mode. I tried to find some example code for STM32G030 SPI slave,  but I could not find anything. 

Do you have any solution? I check the related GPIO Port modes(Altenate Function to NSS, SCK, MOSI, MISO),

and Check the SPI1->CR1, SPI1->CR2, SPI1->SR (0x00000400, 0x00001700, 0x00000002).

This means SPI was enabled, RX FIFO Threshold 8bit/8bit data. TX FIFO Empty).

When I Wrote to SPI1->DR(this means writing to TX FIFO) SPI1->SR changed to 0x00018000.

This means Frame Error in TI mode(which was disabled) and SPI busy.

I don't use any SPI interrupts.

Do you have any idea or good example codes?

[TDK]

You can use CubeMX to set it up.

There are several SPI examples you can follow. Here is one:

STM32CubeG0/Projects/NUCLEO-G031K8/Examples/SPI/SPI_FullDuplex_ComIT_Slave/readme.txt at 44ae4173f7de1c2e943e3650c6472db05df78478 · STMicroelectronics/STM32CubeG0

Using SPI for communication between chips is much harder than using UART. You will need to keep master and slave in sync. Slave needs to be ready to send when the master starts clocking.

[JCho.3]

Thank you TDK. I'll go to the link you gave me and try more.

[JCho.3]

I tried things. I finally got the answer, Master should insert 'delay' for a while after it makes nSS signal down and Slave should use nSS signal as a External Interrupt and 'push' data to Rx FIFO. That's one solution that really works. Thank you.