2014-07-02 06:16 AM
Hello,
Please could someone post the details to manage the SPI NSS signal? The master
drives it ''manually'' using a GPIO bit.
I want to use the SPI as a full-duplex master (sending and receiving data simultaneously). In the Slave side, I want touse the hardware slave select pin because I want to avoid using need an external interrupt to handle it.
I have read many posts about the NSS deficiencies in the STM32 implementation and when I have tried to make work, I didn�t successThanks in advance
#spi-slave-/cs-chip-select-nss #spi #stm32f32016-03-02 07:38 AM
2016-03-02 07:41 AM
Hi,
one year and half after you, I face the same issue. I'm trying to make communicate a Raspberry Pi [master] and many STM32F303RET6 [slaves] together trough SPI interface. In such usage (many slaves), /CS function is mandatory to avoid short circuits on bus. I would like to trigger an RXNE IT at each transmission begining, that is to say at each falling edge of /CS from Raspberry Pi.I used to do this with STM8.
What I experiment (with one slave only, to test) is that whether NSS pin is connected or not, an RxNE IT is triggered regarding the FIFO filling (after 5 bytes for me, the first time) but not on /CS edge.Do somebody know if we can perform multi slave SPI communication on STM32F3x serie chips without using EXTI, as Franck said ?
Thank you in advance