2014-02-06 03:02 PM
I'm using a DMA for the first time (on a STM32F427), and am having a bit of trouble: I don't see SCK on any of my four SPIs when trying to transfer data via the DMA (specifically, I've only tried on the Tx side so far). I tested the SPIs separately, by simply doing a while loop while constantly calling SPI_I2S_SendData(SPI1, 0x77), and it works fine: I see SCK, and data on the MOSI. But when I try to use the DMA, I see no pulses on SCK or data being moved. What's strange is that the ''transfer complete'' ISRs I have enabled are triggering.
Long story short: should I not expect to see SCK when transferring data from memory to the SPI via DMA? Sorry for not posting my code; I left my laptop at work. I can post that tomorrow morning if necessary. Thanks! #stm32 #spi #dma2014-02-06 04:53 PM
Quick blind build
// STM32F4-Discovery SPI2 TX DMA Demo - sourcer32@gmail.com
#include ''stm32f4_discovery.h''
/**************************************************************************/
void GPIO_Configuration(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
/* GPIOB clock enable */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
/* SPI SCK/MISO/MOSI pin configuration */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
GPIO_Init(GPIOB, &GPIO_InitStructure);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource13, GPIO_AF_SPI2); // PB13 SPI2_CLK
GPIO_PinAFConfig(GPIOB, GPIO_PinSource14, GPIO_AF_SPI2); // PB14 SPI2_MISO
GPIO_PinAFConfig(GPIOB, GPIO_PinSource15, GPIO_AF_SPI2); // PB15 SPI2_MOSI
}
/**************************************************************************/
void SPI_Configuration(void)
{
SPI_InitTypeDef SPI_InitStructure;
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
/* SPI configuration */
SPI_I2S_DeInit(SPI2);
/* Initializes the SPI communication */
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_Init(SPI2, &SPI_InitStructure);
/* The Data transfer is performed in the SPI using Direct Memory Access */
/* Enable DMA SPI TX Stream */
DMA_Cmd(DMA1_Stream4, ENABLE);
/* Enable SPI DMA TX Requsts */
SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, ENABLE);
/* Enable the SPI peripheral */
SPI_Cmd(SPI2, ENABLE);
}
/**************************************************************************/
uint8_t TxBuffer[] = ''The quick brown fox jumps over the lazy dog'';
void DMA_Configuration(void)
{
DMA_InitTypeDef DMA_InitStructure;
/* DMA clock enable */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
// DMA1 Channel0 Stream4 SPI2_TX
DMA_DeInit(DMA1_Stream4);
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_Channel = DMA_Channel_0;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&SPI2->DR);
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&TxBuffer[0];
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_BufferSize = sizeof(TxBuffer) - 1;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA1_Stream4, &DMA_InitStructure);
/* Enable DMA Stream Transfer Complete interrupt */
DMA_ITConfig(DMA1_Stream4, DMA_IT_TC, ENABLE);
}
/**************************************************************************/
void NVIC_Configuration(void)
{
NVIC_InitTypeDef NVIC_InitStructure;
/* Enable the DMA gloabal Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream4_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
/**************************************************************************/
void DMA1_Stream4_IRQHandler(void)
{
/* Test on DMA Stream Transfer Complete interrupt */
if (DMA_GetITStatus(DMA1_Stream4, DMA_IT_TCIF4))
{
/* Clear DMA Stream Transfer Complete interrupt pending bit */
DMA_ClearITPendingBit(DMA1_Stream4, DMA_IT_TCIF4);
/* Toggle LED4 */
STM_EVAL_LEDToggle(LED4);
}
}
/**************************************************************************/
int main(void)
{
/* Initialize Leds mounted on STM32F4-Discovery board */
STM_EVAL_LEDInit(LED4);
/* Turn on LED4 */
STM_EVAL_LEDOn(LED4);
NVIC_Configuration();
GPIO_Configuration();
DMA_Configuration();
SPI_Configuration();
while(1); // Do not exit
}
/**************************************************************************/
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t* file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf(''Wrong parameters value: file %s on line %d
'', file, line) */
while (1)
{}
}
#endif
2014-02-07 05:02 AM
void GPIO_Configuration()
{ GPIO_InitTypeDef GPIO_InitStructure;GPIO_StructInit(&GPIO_InitStructure);
RCC_APB2PeriphClockCmd( RCC_APB2Periph_SPI1, Enable );// Configure SPI1 pins for 21mhz operation
GPIO_PinAFConfig(GPIO_SPI1,GPIO_PinSource6,GPIO_AF_SPI1) ; GPIO_InitStructure.GPIO_Pin = SPI1_MISO_PIN ; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_25MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_OType = GPIO_OType_OD; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ; GPIO_Init(GPIO_SPI1, &GPIO_InitStructure);GPIO_PinAFConfig(GPIOB,GPIO_PinSource3,GPIO_AF_SPI1) ;
GPIO_InitStructure.GPIO_Pin = SPI1_SCK_PIN; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_25MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ; GPIO_Init(GPIOB, &GPIO_InitStructure); GPIO_PinAFConfig(GPIO_SPI1,GPIO_PinSource7,GPIO_AF_SPI1) ; GPIO_InitStructure.GPIO_Pin = SPI1_MOSI_PIN; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_25MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ; GPIO_Init(GPIO_SPI1, &GPIO_InitStructure); } /*********************************************************/ /********************************************************* void SPI_Configuration() { StopSPI(); //Stop DMA, SPI/***************************
// SPI1 // ***************************/ // Rx Channel DMA_StructInit(&SPI1RX_DMA_InitStructure); SPI1RX_DMA_InitStructure.DMA_Channel = DMA_Channel_3; SPI1RX_DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)&(SPI1->DR); SPI1RX_DMA_InitStructure.DMA_Memory0BaseAddr = (u32)&g_spi1_adc_data; SPI1RX_DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; SPI1RX_DMA_InitStructure.DMA_BufferSize = g_chain1_buffer_size; SPI1RX_DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; SPI1RX_DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; SPI1RX_DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; SPI1RX_DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; SPI1RX_DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; SPI1RX_DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; DMA_Init(DMA2_Stream2, &SPI1RX_DMA_InitStructure); /* Enable DMA Stream Transfer Complete interrupt */ DMA_ITConfig(DMA2_Stream2, DMA_IT_TC, ENABLE); /*Enable DMA stream*/ DMA_Cmd(DMA2_Stream2, ENABLE); // Tx Channel DMA_StructInit(&SPI1TX_DMA_InitStructure); SPI1TX_DMA_InitStructure.DMA_Channel = DMA_Channel_3; SPI1TX_DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)&(SPI1->DR); SPI1TX_DMA_InitStructure.DMA_Memory0BaseAddr = g_spi1_config_buf_base_ptr; SPI1TX_DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; SPI1TX_DMA_InitStructure.DMA_BufferSize = g_chain1_buffer_size; SPI1TX_DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; SPI1TX_DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; SPI1TX_DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; SPI1TX_DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; SPI1TX_DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; SPI1TX_DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; DMA_Init(DMA2_Stream5, &SPI1TX_DMA_InitStructure); /*Enable DMA stream*/ DMA_Cmd(DMA2_Stream5, ENABLE);// SPI 1 Setup
SPI1_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; SPI1_InitStructure.SPI_Mode = SPI_Mode_Master; SPI1_InitStructure.SPI_DataSize = SPI_DataSize_16b; SPI1_InitStructure.SPI_CPOL = SPI_CPOL_Low; SPI1_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; SPI1_InitStructure.SPI_NSS = SPI_NSS_Soft; SPI1_InitStructure.SPI_BaudRatePrescaler = SPI1SCALER; SPI1_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; SPI1_InitStructure.SPI_CRCPolynomial = 7; SPI_Init(SPI1, &SPI1_InitStructure); SPI_I2S_DMACmd(SPI1, (SPI_I2S_DMAReq_Rx | SPI_I2S_DMAReq_Tx), ENABLE); SPI_Cmd(SPI1, ENABLE); } /*********************************************************/ /*********************************************************/ void Interrupts_Config(void) { NVIC_InitTypeDef NVIC_InitStructure; /* Configure and enable DMA SPI1 (ASIC transfer done) interrupt */ NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream2_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); } /**********************************************************/ /**********************************************************/ ///////////////////////////// // SPI1 shift is complete ///////////////////////////// void DMA2_Stream2_IRQHandler(void) { // Reset interrupt pending bits DMA_ClearITPendingBit(DMA2_Stream2, DMA_IT_TCIF2 ); EndofConversionHandler1(); } /**********************************************************/ So I'm stumped...2014-02-07 05:30 AM
Is DMA2 clock enabled?
JW2014-02-07 05:58 AM
Good question, but yes it is:
RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_DMA1 | RCC_AHB1Periph_DMA2 | RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE, Enable);2014-02-07 06:19 AM
check also:
DMA transfer data size config is HalfWord --> memory buffer MUST be 16bit aligned Clear also DMA and SPI interrupt flags before start DMA transfer.2014-02-07 06:21 AM
Diego,
I will check that the buffer is aligned, but that would likely just cause garbage to be sent, not a complete lack of any transfer, right? Thanks!2014-02-07 06:21 AM
And are the GPIO initialized as you expect? You use some macros you did not post.
Please post a minimal but complete compilable example. JW2014-02-07 06:23 AM
EDIT: Sorry, double posted.
2014-02-07 08:22 AM
I'll try
again
call of SPI_DMAcmd ?**edit(oh no
sorryI tried
SPI_DMACmd
but
you use
SPI_I2S_DMACmd)
In my code DMA_Cmd and SPI_DMACmd are called after SPI enable and from ST manual10.3.15 Flow controller
The flow controller can be:
• The DMA controller: in this case, the number of data items to be transferred is
programmed by software into the DMA_SxNDTR register
before the DMA stream is
enabled.