2020-07-02 09:00 AM
I just got a simple program running on my STM32f0301k6. I am running the clock off a 20MHz crystal and the core is running off the PLL x 2 so everything is running at 40MHz. This means one cycle executes in 25nS, but if I write a loop like
GPIOB->ODR = 1<<1;
GPIOB->ODR &= ~GPIO_PIN_1;
then i see the pin toggle every 300nS or so. Why is this toggle time such a big difference from 25nS? More confusing to me is that if I change the pin mode to high speed, the toggle time gets much *slower*, measuring about 1.2uS
can anyone explain this to me?
2020-07-05 02:16 AM
I think you should look into the timer synchronization topic in the reference manual.
2020-07-05 02:44 AM
thanks, i will do that. why do you say so? Should i be using a timer rather than an interrupt?
2020-07-05 02:54 AM
If the task can be solved by a timer, maybe two timers in a master-slave configuration, or DMA transfers to GPIO registers triggered by a timer, it would be a lot faster.
But I have no idea what exactly do you want to do.
2020-07-05 04:18 AM
I will look into it, although Im not experienced enough to know what you mean at the moment. im trying to make a shift register, which outputs one bit (output pin) and is clocked by a signal (interrupt pin) . The length of the shift register and the values in it can be changed, the clock is unpredictable.