Slow Clock at powerup requires reset each time

[Jeremy Vance]

Posted on June 08, 2018 at 20:57

Hello,

   I'm having an odd time with a board using the STM32F746VGT6 microcontroller that it requires that I reset the board each time that I power it up.  I have several of these and the phenomenon only occurs on about half of the boards.  When it does, it requires shorting the reset pin to ground as I don't have a reset button on this design.  I have checked solder joints of the 8MHz crystal and caps as well as the reset circuit (used from stm32f746 discovery board design).  The code is generated from CUBEMX.  It appears to run about 10 times as slow.  I'm trying to run the main PLL clock output at 192MHz.  Here is my startup code for the clock:

void SystemClock_Config(void)

{

RCC_OscInitTypeDef RCC_OscInitStruct;

RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;

/**Configure the main internal regulator output voltage

*/ __HAL_RCC_PWR_CLK_ENABLE();

__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

/**Initializes the CPU, AHB and APB busses clocks

*/ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 8; RCC_OscInitStruct.PLL.PLLN = 384; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; RCC_OscInitStruct.PLL.PLLQ = 8; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { _Error_Handler(__FILE__, __LINE__); }

/**Activate the Over-Drive mode

*/ if (HAL_PWREx_EnableOverDrive() != HAL_OK) { _Error_Handler(__FILE__, __LINE__); }

/**Initializes the CPU, AHB and APB busses clocks

*/ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV4;

if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK)

{ _Error_Handler(__FILE__, __LINE__); }

PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2

| RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_I2S | RCC_PERIPHCLK_CLK48; PeriphClkInitStruct.PLLSAI.PLLSAIN = 316; PeriphClkInitStruct.PLLSAI.PLLSAIR = 2; PeriphClkInitStruct.PLLSAI.PLLSAIQ = 7; PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV8; PeriphClkInitStruct.PLLSAIDivQ = 1; PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2; PeriphClkInitStruct.Sai1ClockSelection = RCC_SAI1CLKSOURCE_PLLSAI; PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; PeriphClkInitStruct.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; PeriphClkInitStruct.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1; PeriphClkInitStruct.I2c2ClockSelection = RCC_I2C2CLKSOURCE_PCLK1; PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL; PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_CLK48; if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { _Error_Handler(__FILE__, __LINE__); }

/**Configure the Systick interrupt time

*/ HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000);

/**Configure the Systick

*/ HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);

/* SysTick_IRQn interrupt configuration */

HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);}

Can someone help me please?

Thanks,

Jeremy

#cpu-clock-frequency #stm32f746

[waclawek.jan]

Posted on June 12, 2018 at 08:54

Using debugger, read out the content of RCC registers, and compare between the proper/improper states.

JW