2025-11-23 6:48 AM
Hi everyone,
I can't reply to this topic, so I decided to create a new one :)
Long story short. I recently encountered the exact same problem while trying to write my own SD memory card driver. I tried sending 512 bytes via D0. In my case, DMA reported a successful transfer while SDIO was waiting for another 12 (0xc) bytes. The TX underrun flag was set. Disabling the clock and re-enabling it after 96 NOPs (or any other delay) after enabling the transfer didn't help.
The solution I came up with was to disable direct mode in the DMA stream FIFO control register (DMDIS bit in DMA_SxFCR register). After that, I was able to transmit data in polling mode at 24 MHz (I believe this is the maximum frequency for my microcontroller).
P.S.: I'm using an STM32F407VGT6 on a DevEBox board.
P.S.: The reference manual (RM0090) contains some hints regarding SDIO + DMA writes. However, in my opinion, they aren't clear enough. In the SDIO/DMA procedure section (31.3.2), step 4d says: "program the channel to select the peripheral as flow controller"; and in step 4e, it says "configure the incremental burst transfer to 4 beats (at least on the peripheral side)". Also, the Summary of the possible DMA configurations section (10.3.16) says that direct mode is forbidden if we have both a peripheral flow controller and burst transfer. Thus, RM is indirectly telling us to disable direct mode for this DMA stream.
Hope this helped :)