2013-03-11 12:21 PM
Hello,
Does anybody already used sdd1963 lcd controller with STM32 through FSMC? The used code to configure the FSMC is: void FSMC_LCD_Init(void) { FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; FSMC_NORSRAMTimingInitTypeDef p; p.FSMC_AddressSetupTime = 0x01; p.FSMC_AddressHoldTime = 0x01; p.FSMC_DataSetupTime = 0x04; p.FSMC_BusTurnAroundDuration = 0x00; p.FSMC_CLKDivision = 0x00; p.FSMC_DataLatency = 0x00; p.FSMC_AccessMode = FSMC_AccessMode_A; FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1; FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); /* Enable FSMC Bank1_SRAM Bank */ FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE); } My doubt is in the FSMC_MemoryType configuration? I found some examples code in the net and some uses FSMC_MemoryType_SRAM and others FSMC_MemoryType_NOR. Does anybody can share the FSMC initialization code for this controller or help me, please? My lcd initialization is void ini(void) { lcd_rst(); LCD_WR_REG(0x0001); Delay(500); LCD_WR_REG(0x0011); Delay(500); LCD_WR_REG(0x0029); Delay(500); LCD_WR_REG(0x00E2); Delay(500); LCD_WR_Data(0x0021); Delay(500); LCD_WR_Data(0x0002); Delay(500); LCD_WR_Data(0x0004); Delay(500); LCD_WR_REG(0x00E0); Delay(500); LCD_WR_Data(0x0001); Delay(500); LCD_WR_REG(0x00E0); Delay(500); LCD_WR_Data(0x0003); Delay(500); LCD_WR_REG(0x0001); Delay(500); LCD_WR_REG(0x00E6); Delay(500); LCD_WR_Data(0x0002); Delay(500); LCD_WR_Data(0x0048); Delay(500); LCD_WR_Data(0x009E); Delay(500); LCD_WR_REG(0x00B0); Delay(500); LCD_WR_Data(0x0028); Delay(500); LCD_WR_Data(0x0000); Delay(500); LCD_WR_Data(0x0001); Delay(500); LCD_WR_Data(0x003F); Delay(500); LCD_WR_Data(0x0000); Delay(500); LCD_WR_Data(0x00EF); Delay(500); LCD_WR_Data(0x0000); Delay(500); LCD_WR_REG(0x00B4); Delay(500); LCD_WR_Data(0x0001); Delay(500); LCD_WR_Data(0x00B8); Delay(500); LCD_WR_Data(0x0000); Delay(500); LCD_WR_Data(0x0046); Delay(500); LCD_WR_Data(0x000F); Delay(500); LCD_WR_Data(0x0000); Delay(500); LCD_WR_Data(0x0000); Delay(500); LCD_WR_Data(0x0000); LCD_WR_REG(0x00B6); Delay(500); LCD_WR_Data(0x0001); Delay(500); LCD_WR_Data(0x0048); Delay(500); LCD_WR_Data(0x0000); Delay(500); LCD_WR_Data(0x000B); Delay(500); LCD_WR_Data(0x0007); Delay(500); LCD_WR_Data(0x0000); Delay(500); LCD_WR_Data(0x0000); Delay(500); LCD_WR_REG(0x002A); Delay(500); LCD_WR_Data(0x0000); Delay(500); LCD_WR_Data(0x0000); Delay(500); LCD_WR_Data(0x0001); Delay(500); LCD_WR_Data(0x003F); Delay(500); LCD_WR_REG(0x002B); Delay(500); LCD_WR_Data(0x0000); Delay(500); LCD_WR_Data(0x0000); Delay(500); LCD_WR_Data(0x0000); Delay(500); LCD_WR_Data(0x00EF); Delay(500); LCD_WR_REG(0x00F0); Delay(500); LCD_WR_Data(0x0003); Delay(500); LCD_WR_REG(0x003A); Delay(500); LCD_WR_Data(0x0003) Delay(500); LCD_WR_REG(0x0013); Delay(500); LCD_WR_REG(0x0029); Delay(500); } Thanks in advance! Best regards, -- Guilherme Amaral #ssd1963-stm32-fsmc-lcd2013-03-12 01:15 PM
Yes, i am using it.
See: As soon as i get to the work i will post you a fsmc setup configuration.2013-03-13 02:31 AM
Hi,
So, as I promised before. Here are the init script and SSD driver written by myself and used in posted video. PS: See the attachment. PSS: The SSD configuration is: typedef struct { uint8_t HFLIP; uint8_t VFLIP; uint16_t HRes; uint16_t VRes; uint32_t pixel_clock; uint16_t Htotal_period; uint16_t Hnon_display; uint8_t Hsync_pulse; uint16_t Vtotal_lines; uint16_t Vnon_display; uint8_t Vsync_pulse; uint8_t brightness; } system_config_t; const system_config_tsystem_conf= { 0,//HFLIP 1,//VFLIP 320,//HRes 240,//VRes 6400,//pixel_clock 408,//Htotal_period 68,//Hnon_display 30,//Hsync_pulse 262,//Vtotal_lines 18,//Vnon_display 4,//Vsync_pulse 0xA0, //brightness }; Regards, TK ________________ Attachments : fsmc.c : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I0eO&d=%2Fa%2F0X0000000bgt%2FtLCVb20nKAFlxERFejCOFg3gZHDd6HQryooiMKBzuXc&asPdf=falsefsmc.h : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I0g6&d=%2Fa%2F0X0000000bgv%2Fj_8nLyBjfXUhwXPRrnRxUntLMFN9NFI0EwXEvanCYwk&asPdf=falseSSD.c : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I0fY&d=%2Fa%2F0X0000000bgw%2F_dQ6jU.J7LqUrSjiBx3W6WG.rKKiBuI.Zq3whpIRoIg&asPdf=falseSSD.h : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I10s&d=%2Fa%2F0X0000000bgq%2FFS2hjIL_912ANOi9tlaOn.K1m1PHrQWECpYS9EyobbY&asPdf=false2013-03-14 08:49 AM
Hi Tomas!
Nice video! Congratulations!Thanks for the reply
and
consequent
help.
The code will be usefull to I understand where I'm failing. Best regards, -- Guilherme Amaral2014-09-15 05:25 AM