RXNE irq generation

[ionutF]

Posted on March 29, 2016 at 17:29

STM32f100

I think there is an error in the reference manual for st32f100xx

The start bit is confirmed (RXNE flag set, interrupt generated if RXNEIE=1)....

According to this RXNE interrupt occurs when the start bit is confirmed. But earlier it is written : 

When a character is received:

The RXNE bit is set. It indicates that the content of the shift register is transferred to the

RDR. In other words, data has been received and can be read (as well as its

associated error flags)

Meaning that RXNE interrupt occurs after the full reception of the byte (all 10/11 bits), i guess after the stop bit.Practice confirmed that RXNE irq occurs when the data is ready to be read.  #poor-quality-of-documentation

[waclawek.jan]

Posted on March 29, 2016 at 17:54

This is very poor wording, rather than a clean error.

It is probably meant to be something like ''start bit is confirmed if... and validated if... once start bit is confirmed or validated, reception commences and there is nothing which will stop it; after all bits are received RXNE will be set, interrupt thrown, and if there was noise detected either during start or data bits, NE is set too.'' There are more issues related to this section: - is there noise detection during stop bit detection? If so, how is it related to noise error and framing error status bits? - how does OVER8 and ONEBIT influence the described start bit detection procedure (and, for that matter, stop bit detection procedure for all settings of the stopbit)? These issues pertains across all STM32 RMs as far as I have checked. Not that I am surprised... :( JW