2025-02-04 11:42 PM
hi all,
i was trying to work with stm32u585 microcontroller and an external RAM IS66WVQ2M4DALL , which is a QSPI based RAM can work in 133Mhz.the RAM support DDR based data transfer. Here i am attaching my OSPI configuration
hospi1.Instance = OCTOSPI1;
hospi1.Init.FifoThreshold = 1;
hospi1.Init.DualQuad = HAL_OSPI_DUALQUAD_DISABLE;
hospi1.Init.MemoryType = HAL_OSPI_MEMTYPE_APMEMORY;
hospi1.Init.DeviceSize = 20;
hospi1.Init.ChipSelectHighTime = 1;
hospi1.Init.FreeRunningClock = HAL_OSPI_FREERUNCLK_DISABLE;
hospi1.Init.ClockMode = HAL_OSPI_CLOCK_MODE_0;
hospi1.Init.WrapSize = HAL_OSPI_WRAP_NOT_SUPPORTED;
hospi1.Init.ClockPrescaler = 2;
hospi1.Init.SampleShifting = HAL_OSPI_SAMPLE_SHIFTING_NONE;
hospi1.Init.DelayHoldQuarterCycle = HAL_OSPI_DHQC_ENABLE;
hospi1.Init.ChipSelectBoundary = 0;
hospi1.Init.DelayBlockBypass = HAL_OSPI_DELAY_BLOCK_USED;
hospi1.Init.MaxTran = 0;
hospi1.Init.Refresh = 320;
if (HAL_OSPI_Init(&hospi1) != HAL_OK)
{
Error_Handler();
}
sOspiManagerCfg.ClkPort = 1;
sOspiManagerCfg.DQSPort = 1;
sOspiManagerCfg.NCSPort = 1;
sOspiManagerCfg.IOLowPort = HAL_OSPIM_IOPORT_1_LOW;
if (HAL_OSPIM_Config(&hospi1, &sOspiManagerCfg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
Error_Handler();
}
HAL_OSPI_DLYB_Cfg_Struct.Units = 0;
HAL_OSPI_DLYB_Cfg_Struct.PhaseSel = 0;
if (HAL_OSPI_DLYB_SetConfig(&hospi1, &HAL_OSPI_DLYB_Cfg_Struct) != HAL_OK)
{
Error_Handler();
}
here i am confused about selecting hospi1.Init.MemoryType = HAL_OSPI_MEMTYPE_APMEMORY;
#define HAL_OSPI_MEMTYPE_MICRON ((uint32_t)0x00000000U) /*!< Micron mode */
#define HAL_OSPI_MEMTYPE_MACRONIX ((uint32_t)OCTOSPI_DCR1_MTYP_0) /*!< Macronix mode */
#define HAL_OSPI_MEMTYPE_APMEMORY ((uint32_t)OCTOSPI_DCR1_MTYP_1) /*!< AP Memory mode */
#define HAL_OSPI_MEMTYPE_MACRONIX_RAM ((uint32_t)(OCTOSPI_DCR1_MTYP_1 | OCTOSPI_DCR1_MTYP_0)) /*!< Macronix RAM mode */
#define HAL_OSPI_MEMTYPE_HYPERBUS ((uint32_t)OCTOSPI_DCR1_MTYP_2) /*!< Hyperbus mode */
from some forums its get to know that this is based on the data order D0/D1 or D1/D0 from the datasheet of my memory ship the timing diagram look like
so here what option i need to take. and planning to work with memory mapped mode . here when i tried with read and write my read and write is corrupting can anybody check with my configuration
2025-02-05 12:30 AM
Hello @sabari1;
The memory type depends on the D0/D1 ordering: The micron (and compatible memories) use D0/D1 Ordering while Macronix (and compatible memories) use D1/D0 data ordering and Macronix RAM (and compatible memories) use D1/D0 ordering with dedicated address mapping.
If you have a memory different from Micron and Macronix you simply need to look at the data ordering in the memory datasheet and then select the one that matches it in STM32 OSPI configuration.
But, when using the QSPI mode, any memory type can be chosen if it is supported by the Octo-SPI interface. The memory type does not affect the functionality for the QSPI. The memory type has no impact in Quad-SPI mode.
Please take a look at AN5050 table8. and precisely note 2.
I recommend you to try to decrease the OCTOSPI frequency. Please take a look at DS13086 table143. and table 144. to check the maximum OCTOSPI frequency.
Thank you.
Kaouthar
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2025-02-05 02:08 AM
hi @KDJEM.1
IS66WVQ2M4DALL is working on QSPI but it also uses the DQSM pin ,if we configured the OSPI in Quad mode in cubemx the DQSM pin option is not available so i am configuring it as OSPI and using the first IO pins only [IO3:0].
so am using the DQSM pin for the port1 for my purpose.
and even i tried with reducing the clock up to 20 MHz even that time itself its behaving same ,anyways am attaching the OSPI context details below
if (HAL_OSPI_DLYB_GetClockPeriod(&hospi2,&dlyb_cfg) != HAL_OK)
{
Error_Handler() ;
}
/*when DTR, PhaseSel is divided by 4 (emperic value)*/
dlyb_cfg.PhaseSel /=4;
/* save the present configuration for check*/
dlyb_cfg_test = dlyb_cfg;
/*set delay block configuration*/
HAL_OSPI_DLYB_SetConfig(&hospi2,&dlyb_cfg);
/*check the set value*/
HAL_OSPI_DLYB_GetConfig(&hospi2,&dlyb_cfg);
if ((dlyb_cfg.PhaseSel != dlyb_cfg_test.PhaseSel) || (dlyb_cfg.Units != dlyb_cfg_test.Units))
{
Error_Handler() ;
}
/*Configure AP memory register */
Configure_ISSMemory();
/*Configure Memory Mapped mode*/
sCommand.OperationType = HAL_OSPI_OPTYPE_WRITE_CFG;
sCommand.FlashId = HAL_OSPI_FLASH_ID_1;
sCommand.Instruction = 0x20;//WRITE_LINEAR_BURST_CMD;
sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_4_LINES;
sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_8_BITS;
sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE;
sCommand.AddressMode = HAL_OSPI_ADDRESS_4_LINES;
sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS;
// sCommand.Address = 0x0;
sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE;
sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE;
sCommand.DataMode = HAL_OSPI_DATA_4_LINES;
sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_ENABLE;
sCommand.DummyCycles = 5;//5;
sCommand.DQSMode = HAL_OSPI_DQS_ENABLE;
sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD;
if (HAL_OSPI_Command(&hospi2, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
Error_Handler();
}
sCommand.OperationType = HAL_OSPI_OPTYPE_READ_CFG;
sCommand.Instruction = 0xA0;//READ_LINEAR_BURST_CMD;
sCommand.DummyCycles = 5;//8;
// sCommand.DQSMode = HAL_OSPI_DQS_ENABLE;
if (HAL_OSPI_Command(&hospi2, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
Error_Handler();
}
sMemMappedCfg.TimeOutActivation = HAL_OSPI_TIMEOUT_COUNTER_ENABLE;//HAL_OSPI_TIMEOUT_COUNTER_ENABLE;
sMemMappedCfg.TimeOutPeriod = 0x34;
if (HAL_OSPI_MemoryMapped(&hospi2, &sMemMappedCfg) != HAL_OK)
{
Error_Handler();
}
thanks