PWM jitter on a home made card

[EliazLB]

Hello everyone,

Some time ago I asked on this website information about jitter on a PWM : Solved: PWM jitter - STMicroelectronics Community

The problem was that when generating a PWM, it wasn't very stable. At the time changing the source clock to the external clock of the nucleoboard worked and stabilized everything.

Since then, I created my own board using an STM32G474QE (128 pins) with an 8MHz (+/-50ppm) external oscillator.

I tried to generate the PWM and I am encountering the same exact problem again, the jitter is back. This time, I directly setup the clock as the external one. 

I checked it up and it feels to me that the problem could be coming from the stability of my oscillator (I have frequency variation on it's output ranging from 7,999,950 to 8,000,050Hz). 

Now my question is, could this really be the problem and could a lower ppm oscillator work ?

I tried looking up information on my own especially using AN2867 but I only get information about crystal oscillator.

Thank you very much for any answer provided

[Andrew Neil]

Please show your schematic and some good, clear photographs of your board & setup

How to write your question to maximize your chances to find a solution

[EliazLB]

Here is the schematic and a picture of the µcontroller. The 8Mhz oscillator is the smaller one on the right.

The part is 831072801.

[mƎALLEm]

Hello,

Are you sure you selected HSE as the source clock for the PLL?

[EliazLB]

 Yes, this is my configuration for the clock

[AScha.3]

Hi,

the jitter from your oszillator 831072801  is about: 

Period Jitter (pk-pk): ±80ps typ , you might not see on any scope.

So check at first using the 8MHz input direct, not with PLL in the clock tree. (should give some  ±10ps typ ).

Then try same, but with PLL -> high frequency ; and do not use extreme PLL settings (low or very high frequency output) , because the PLLs have a range of input and output frequencies, they are optimized for.

Maybe check in ds of your cpu, might have some jitter data for the PLL driven clocks, from ds G474 :

So the PLL is not as good as without PLL (10ps -> 21 ps) , but not visible on a scope.