Purpose of SysTick Calibration Register

[andywild]

Posted on May 06, 2008 at 21:59

Purpose of SysTick Calibration Register

[andywild]

Posted on May 17, 2011 at 12:21

Hi all,

acording to the reference manual the SysTick Calibration Register is fixed to 9000 to provide 1ms Clock for a time base. I looked throughout the whole manual for this time base to be clocked by this 1ms Pulse out of SysTick. Where is that time base? On the other hand to get SysTick Handler Interupts, this rate is solely dependant on the Reload Register of SysTick. If the SysTick is clocked with 72Mhz the Reload Register has to be set to 71999 to get 1ms rate. So what is the influence of the calibration register in this context? Is there a block diagram of SysTick available? Thanks your help Andy

[edware]

Posted on May 17, 2011 at 12:21

Hi Andy,

The systick timebase is called the Cortex System timer. See the clock tree diagram on pp49 (Figure 7) of the ST RM0008 reference manual. To summarise, the timebase starts from SYSCLK, goes through the AHB prescaler and is then divided by 8. Usually the AHB prescaler is 1, so (with a 72MHZ sysclk) 72MHz /1 /8 = 9MHz. 9MHz / 9000 [the calibration value] is 1kHz or 1ms. If you're running off the HSI, the value of 9000 must be changed. Hope that helps Ed

[andywild]

Posted on May 17, 2011 at 12:21

Hi Ed,

my SysTick is clocked with full 72Mhz, not with 9MHz. I need a rate of 1ms for the SysTick Handler. This is done and works perfectly by writing the value of 71999 to the SysTick-Reload Register. So the SysTick appears to me as a simple 24Bit Down-Counter with Auto-Reload. But my question is: What does the SysTick-CALIBRATION Register? According to the reference manual it is NOT involved in the timing of generating interupts to SysTick Handler. It is further mentioned that the 1ms output (created by the fixed 9000 value of the calibration register) can be used to build or to trigger some sort of time base. This is the part I do not understand. Which time base is meant? Thanks for help Andy

[edware]

Posted on May 17, 2011 at 12:21

Hi Andy,

On further inspection of the information, the systick timer may be clocked by HCLK or HCLK/8 - see the SysTick Control and Status Register in the ARM M3 Cortex Technical Reference Manual. This register reset state is systick clocksource = HCLK/8. Also see the ST documentation 'ARM®-based 32-bit MCU STM32F101xx and STM32F103xx firmware library'. The function SysTick_CLKSourceConfig function in section 18.2.1 describes the systick clock sources. For a clock source of HCLK , the reload would be 72000 - 1. For a clock source of HCLK/8, the reload would be 9000 - 1/8 of a count. (for a 1ms systick interrupt..) The calibration register is a read only register provided (I assume) to allow software to determine the reload value without any magic numbers being involved. I imagine future variants which may run faster would have a different calibration value. Does that answer your question? Ed

[andywild]

Posted on May 17, 2011 at 12:21

Hi Ed,

thank you I think you are right! The SysTick rate is only dependant on it´s load register and input clock. However to assist any software to calculate the value for the load register, it can use the read only calibration register in order to determine the value more easily. That´s the only practical meaning of the calibration register. Have a nice week Andi

[andrea]

Posted on May 17, 2011 at 12:21

Hey just for reference...

I've been dealing with the same question, I wanted to setup my SYSCLK but I didn't want to use the ST firmware and was looking for the SYSTICK configuration register. I found it in the ARM webpage under

http://infocenter.arm.com/help/topic/com.arm.doc.ddi0337e/DDI0337E_cortex_m3_r1p1_trm.pdf

I hope it helps :D

[mvi]

Posted on May 17, 2011 at 12:21

Hi!

I wondering about this myself... Surely agree on the 9000 = 1/8 * 72000 => 1ms... Also the Cortex-M3 Tech Ref was a nice link. Thanks for the info ppl! Much appreciated! -Mad D