2008-01-17 06:18 AM
Cascading timers and capture on external event
2011-05-17 03:21 AM
Hi all,
I need to have the TIM1 triggered by 72MHz and TIM2 will be slave and triggered by TIM1 Overflow. So this will create a 32bit timer with 72Mhz clocking rate. In order to read the 32bit count at an external event I will configure one capture register for each timer, these capture registers will be triggered by the same external event input line. With this I hope to avoid inconsistencies due to overflow TIM1 at the same time when a capture occurs. Is that true? Any other opinion to handle the overflow problem with to cascaded 16Bit Counters? (No software please, because it´s too slow!) Thanks for you help Andy2011-05-17 03:21 AM
Hi andy,
You can have a look at ''AN2592'' on web : How to achieve 32-bit timer resolution using the link system in STM32F101xx and STM32F103xx microcontrollers. Hope this helps you ;) STOne-32.2011-05-17 03:21 AM
Hi STOne32,
this AN2592 helps me a lot! Thank you Andy2011-05-17 03:21 AM
Dear STOne32,
in the AN2592 the Master TIM3 is clocked with 72Mhz. According to the reference manual TIM3 is connected to APB1 clock which is 36MHz maximum. How can TIM3 operate with 72MHz? Thanks Andy